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Add SysTick flags #116

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Oct 3, 2018
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28 changes: 28 additions & 0 deletions src/peripheral/scb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -619,6 +619,9 @@ impl SCB {
const SCB_ICSR_PENDSVSET: u32 = 1 << 28;
const SCB_ICSR_PENDSVCLR: u32 = 1 << 27;

const SCB_ICSR_PENDSTSET: u32 = 1 << 26;
const SCB_ICSR_PENDSTCLR: u32 = 1 << 25;

impl SCB {
/// Set the PENDSVSET bit in the ICSR register which will pend the PendSV interrupt
pub fn set_pendsv() {
Expand All @@ -640,4 +643,29 @@ impl SCB {
(*Self::ptr()).icsr.write(SCB_ICSR_PENDSVCLR);
}
}

/// Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt
#[inline]
pub fn set_pendst() {
unsafe {
(*Self::ptr()).icsr.write(SCB_ICSR_PENDSTSET);
}
}

/// Check if PENDSTSET bit in the ICSR register is set meaning SysTick interrupt is pending
#[inline]
pub fn is_pendst_pending() -> bool {
unsafe {
(*Self::ptr()).icsr.read() & SCB_ICSR_PENDSTSET == SCB_ICSR_PENDSTSET
}
}


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Minor nit: One blank line too many.

/// Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt
#[inline]
pub fn clear_pendst() {
unsafe {
(*Self::ptr()).icsr.write(SCB_ICSR_PENDSTCLR);
}
}
}