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Check sidecar PG signal #2077

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Merged
merged 2 commits into from
Jun 2, 2025
Merged

Check sidecar PG signal #2077

merged 2 commits into from
Jun 2, 2025

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labbott
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@labbott labbott commented May 21, 2025

This gives another data point for determining whether everything is correctly installed

This gives another data point for determining whether everything
is correctly installed
@labbott labbott requested a review from Aaron-Hartwig May 21, 2025 17:16
@Aaron-Hartwig
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When things are all installed correctly, we sequence as expected:

$ humility ringbuf sequencer
humility: attached via ST-Link V3
humility: ring buffer drv_oxide_vpd::__RINGBUF in sequencer:
humility: ring buffer drv_packrat_vpd_loader::__RINGBUF in sequencer:
humility: ring buffer drv_sidecar_seq_server::__RINGBUF in sequencer:
 NDX LINE      GEN    COUNT PAYLOAD
   0  845        1        1 FpgaInit
   1  853        1        1 LoadingFpgaBitstream
   2  898        1        1 MainboardControllerId(0x1de5bae)
   3  912        1        1 MainboardControllerChecksum(0xaf58b0e)
   4  944        1        1 MainboardControllerVersion(0x283)
   5  945        1        1 MainboardControllerSha(0x3c8d1c33)
   6  946        1        1 FpgaInitComplete
   7   31        1        1 LoadingClockConfiguration
   8  971        1        1 ClockConfigurationComplete
   9  226        1        1 FrontIOBoardPowerEnable(true)
  10  243        1        1 FrontIOBoardPowerGood
  11  976        1        1 FrontIOBoardPresent
  12   81        1        1 LoadingFrontIOControllerBitstream { fpga_id: 0x0 }
  13   91        1        1 FrontIOControllerIdent { fpga_id: 0x0, ident: 0x1deaa55 }
  14   98        1        1 FrontIOControllerChecksum { fpga_id: 0x0, checksum: [ 0xd4, 0xaa, 0x2a, 0x16 ], expected: [ 0xd4, 0xaa, 0x2a, 0x16 ] }
  15   81        1        1 LoadingFrontIOControllerBitstream { fpga_id: 0x1 }
  16   91        1        1 FrontIOControllerIdent { fpga_id: 0x1, ident: 0x1deaa55 }
  17   98        1        1 FrontIOControllerChecksum { fpga_id: 0x1, checksum: [ 0xd4, 0xaa, 0x2a, 0x16 ], expected: [ 0xd4, 0xaa, 0x2a, 0x16 ] }
  18  337        1        1 TofinoSequencerTick(Disabled, A2 { error: None })
  19  152        1        1 FanModuleLedUpdate(Zero, On)
  20  152        1        1 FanModuleLedUpdate(One, On)
  21  152        1        1 FanModuleLedUpdate(Two, On)
  22  152        1        1 FanModuleLedUpdate(Three, On)
  23  337        1        3 TofinoSequencerTick(Disabled, A2 { error: None })
  24  243        1        1 FrontIOBoardPowerGood
  25  326        1        1 FrontIOBoardPhyPowerEnable(true)
  26  548        1        1 FrontIOBoardPhyOscGood
  27  337        1       17 TofinoSequencerTick(Disabled, A2 { error: None })

When I unplug the power cable, the sequencer repeatedly crashes (known and beyond the scope of this PR). If I humility jefe -H sequencer and then look at the ringbuf, I can see the last entry is regarding power not being good (which I think is the baby step we wanted to take here).

$ humility ringbuf sequencer
humility: attached via ST-Link V3
humility: ring buffer drv_oxide_vpd::__RINGBUF in sequencer:
humility: ring buffer drv_packrat_vpd_loader::__RINGBUF in sequencer:
humility: ring buffer drv_sidecar_seq_server::__RINGBUF in sequencer:
NDX LINE      GEN    COUNT PAYLOAD
  0  845        1        1 FpgaInit
  1  888        1        1 SkipLoadingBitstream
  2  898        1        1 MainboardControllerId(0x1de5bae)
  3  912        1        1 MainboardControllerChecksum(0xaf58b0e)
  4  944        1        1 MainboardControllerVersion(0x283)
  5  945        1        1 MainboardControllerSha(0x3c8d1c33)
  6  946        1        1 FpgaInitComplete
  7   31        1        1 LoadingClockConfiguration
  8  971        1        1 ClockConfigurationComplete
  9  240        1        1 FrontIOBoardPowerNotGood

@labbott labbott merged commit e24ec28 into master Jun 2, 2025
135 checks passed
@labbott labbott deleted the sidecar_pg branch June 2, 2025 14:51
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2 participants