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[AMDGPU] Fix MC/Disassembler/AMDGPU/decode-err.txt. #96621
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It fails downstream now that llvm#95237 removed flushing the output stream on printing every instruction.
@llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-mc Author: Ivan Kosarev (kosarev) ChangesIt fails downstream now that Full diff: https://github.com/llvm/llvm-project/pull/96621.diff 1 Files Affected:
diff --git a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
index d7417929a8e1b..3a2cef5feb318 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
@@ -1,17 +1,19 @@
-# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GCN %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s 2>&1 >/dev/null | FileCheck -check-prefix=GCN-ERR %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W32 %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=GFX11,W64 %s
-# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GFX12 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s 2>&1 >/dev/null | FileCheck -check-prefix=GFX11-ERR %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX12 %s
+# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s 2>&1 >/dev/null | FileCheck -check-prefix=GFX12-ERR %s
-# GCN: [[@LINE+1]]:1: warning: invalid instruction encoding
+# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0xdf,0x00,0x00,0x02
# this is s_singleuse_vdst 0x1234, which is only valid on gfx1150
-# GFX11: [[@LINE+1]]:1: warning: invalid instruction encoding
+# GFX11-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0x34,0x12,0x93,0xbf
# this is s_waitcnt_vscnt exec_hi, 0x1234, which is valid on gfx11, but not on gfx12
-# GFX12: [[@LINE+1]]:1: warning: invalid instruction encoding
+# GFX12-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0x34,0x12,0x7f,0xbc
# W32: v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; encoding: [0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf]
@@ -39,11 +41,11 @@
0x10,0x40,0x40,0xcc,0x00,0x11,0x02,0x18 # src2 sgpr0
# this is ds_add_f32 with gds bit which is not valid on gfx12+
-# GFX12: [[@LINE+1]]:1: warning: invalid instruction encoding
+# GFX12-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0x00,0x00,0x56,0xd8,0x00,0x01,0x00,0x00
# this is image_msaa_load where samp field for gfx12 VSAMPLE is not all zeros
-# GFX12: [[@LINE+1]]:1: warning: invalid instruction encoding
+# GFX12-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
0x06,0x00,0x46,0xe4,0x01,0x10,0x80,0x00,0x05,0x06,0x07,0x00
# This is ds_read_b32 with gds bit which is not valid on gfx90a.
|
0x00,0x00,0x56,0xd8,0x00,0x01,0x00,0x00 | ||
|
||
# this is image_msaa_load where samp field for gfx12 VSAMPLE is not all zeros | ||
# GFX12: [[@LINE+1]]:1: warning: invalid instruction encoding | ||
# GFX12-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding | ||
0x06,0x00,0x46,0xe4,0x01,0x10,0x80,0x00,0x05,0x06,0x07,0x00 | ||
|
||
# This is ds_read_b32 with gds bit which is not valid on gfx90a. |
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@jayfoad We don't seem to check GFX90A
prefixes in this test.
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Yes, I noticed that recently thanks to filecheck_lint.py
. If you add a RUN line for gfx90a, the check fails. It needs more investigation.
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1200 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GFX12 %s | ||
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding -filetype=null < %s 2>&1 | FileCheck -check-prefix=GCN-ERR %s | ||
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=W32 %s | ||
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefixes=W64 %s |
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The capitalized wavefrontsize features shouldn't even parse? You also should never need to specify the negated form
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The subtarget features are processed as a state machine assigning values to the subtarget variable as each case is encountered. Code shouldn't be relying on a boolean is this feature present, but checking the resulting value of WavefrontSize
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Plenty of code goes straight to the feature bits:
$ grep -r getFeatureBits.*FeatureWavefrontSize lib/Target/AMDGPU/
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: if (isGFX10Plus() && getFeatureBits()[AMDGPU::FeatureWavefrontSize64] &&
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: !getFeatureBits()[AMDGPU::FeatureWavefrontSize32]) {
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: if (!getFeatureBits()[AMDGPU::FeatureWavefrontSize32])
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: if (!getFeatureBits()[AMDGPU::FeatureWavefrontSize64])
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: if (!getFeatureBits()[AMDGPU::FeatureWavefrontSize32])
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp: if (!getFeatureBits()[AMDGPU::FeatureWavefrontSize64])
lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp: if (STI->getFeatureBits().test(FeatureWavefrontSize32))
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: if (STI->getFeatureBits().test(FeatureWavefrontSize16))
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: if (STI->getFeatureBits().test(FeatureWavefrontSize32))
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: STI->getFeatureBits().test(FeatureWavefrontSize32);
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: STI->getFeatureBits().test(FeatureWavefrontSize32);
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: bool IsWave32 = STI->getFeatureBits().test(FeatureWavefrontSize32);
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp: if (STI->getFeatureBits().test(FeatureWavefrontSize32)) {
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The capitalized wavefrontsize features shouldn't even parse?
It seems to get lowered before processing. Not sure if it should or shouldn't be done, though.
Re negations: that would be an unrelated change anyway, so I will submit this as is, if no objections.
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Plenty of code is broken?
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/123/builds/747 Here is the relevant piece of the build log for the reference:
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It fails downstream now that llvm#95237 removed flushing the output stream on printing every instruction.
It fails downstream now that llvm#95237 removed flushing the output stream on printing every instruction.
It fails downstream now that
#95237 removed flushing the output stream on printing every instruction.