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[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default #126880

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Feb 19, 2025
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[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default #126880

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410a945
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default
nikic Feb 12, 2025
e0caefe
Use different intrinsic in wasm lld test
nikic Feb 17, 2025
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6 changes: 6 additions & 0 deletions lld/test/wasm/lto/Inputs/libcall-return-addr.ll
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@@ -0,0 +1,6 @@
target datalayout = "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-i128:128-f128:64-n32:64-S128-ni:1:10:20"
target triple = "wasm32-unknown-emscripten"

define ptr @emscripten_return_address() {
ret ptr null
}
6 changes: 0 additions & 6 deletions lld/test/wasm/lto/Inputs/libcall-truncsfhf2.ll
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18 changes: 18 additions & 0 deletions lld/test/wasm/lto/libcall-return-addr.ll
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@@ -0,0 +1,18 @@
; RUN: llvm-as %s -o %t.o
; RUN: llvm-as %p/Inputs/libcall-return-addr.ll -o %t.return-addr.o
; RUN: rm -f %t.a
; RUN: llvm-ar rcs %t.a %t.return-addr.o
; RUN: not wasm-ld --export-all %t.o %t.a -o %t.wasm 2>&1 | FileCheck %s

target datalayout = "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-i128:128-f128:64-n32:64-S128-ni:1:10:20"
target triple = "wasm32-unknown-emscripten"

@g_ptr = global ptr null

define void @_start() {
%addr = call ptr @llvm.returnaddress(i32 1)
store ptr %addr, ptr @g_ptr
ret void
}

; CHECK: wasm-ld: error: {{.*}}return-addr.o): attempt to add bitcode file after LTO (emscripten_return_address)
20 changes: 0 additions & 20 deletions lld/test/wasm/lto/libcall-truncsfhf2.ll
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4 changes: 2 additions & 2 deletions llvm/include/llvm/IR/RuntimeLibcalls.def
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Expand Up @@ -384,8 +384,8 @@ HANDLE_LIBCALL(FPEXT_F16_F128, "__extendhftf2")
HANDLE_LIBCALL(FPEXT_F16_F80, "__extendhfxf2")
HANDLE_LIBCALL(FPEXT_F32_F64, "__extendsfdf2")
HANDLE_LIBCALL(FPEXT_F16_F64, "__extendhfdf2")
HANDLE_LIBCALL(FPEXT_F16_F32, "__gnu_h2f_ieee")
HANDLE_LIBCALL(FPROUND_F32_F16, "__gnu_f2h_ieee")
HANDLE_LIBCALL(FPEXT_F16_F32, "__extendhfsf2")
HANDLE_LIBCALL(FPROUND_F32_F16, "__truncsfhf2")
HANDLE_LIBCALL(FPROUND_F64_F16, "__truncdfhf2")
HANDLE_LIBCALL(FPROUND_F80_F16, "__truncxfhf2")
HANDLE_LIBCALL(FPROUND_F128_F16, "__trunctfhf2")
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3 changes: 0 additions & 3 deletions llvm/lib/IR/RuntimeLibcalls.cpp
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Expand Up @@ -170,9 +170,6 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
// TODO: BridgeOS should be included in isOSDarwin.
setLibcallName(RTLIB::EXP10_F32, "__exp10f");
setLibcallName(RTLIB::EXP10_F64, "__exp10");
} else {
setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
}

if (TT.isGNUEnvironment() || TT.isOSFuchsia() ||
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3 changes: 3 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Expand Up @@ -767,6 +767,9 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
setLibcallName(LC.Op, LC.Name);
setLibcallCallingConv(LC.Op, LC.CC);
}
} else if (!Subtarget->isTargetMachO()) {
setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
}

if (Subtarget->isThumb1Only())
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5 changes: 0 additions & 5 deletions llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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Expand Up @@ -1886,11 +1886,6 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
setLibcallName(RTLIB::SQRT_F32, "__hexagon_fast2_sqrtf");
else
setLibcallName(RTLIB::SQRT_F32, "__hexagon_sqrtf");

// Routines to handle fp16 storage type.
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
setLibcallName(RTLIB::FPROUND_F64_F16, "__truncdfhf2");
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
}

const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {
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3 changes: 0 additions & 3 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Expand Up @@ -1549,9 +1549,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
if (Subtarget.useRVVForFixedLengthVectors())
setTargetDAGCombine(ISD::BITCAST);

setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");

// Disable strict node mutation.
IsStrictFPEnabled = true;
EnableExtLdPromotion = true;
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5 changes: 0 additions & 5 deletions llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
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Expand Up @@ -377,11 +377,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(

setMaxAtomicSizeInBitsSupported(64);

// Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
// consistent with the f64 and f128 names.
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");

// Define the emscripten name for return address helper.
// TODO: when implementing other Wasm backends, make this generic or only do
// this on emscripten depending on what they end up doing.
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4 changes: 0 additions & 4 deletions llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
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Expand Up @@ -537,10 +537,6 @@ struct StaticLibcallNameMap {
Map[NameLibcall.first] = NameLibcall.second;
}
}
// Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
// consistent with the f64 and f128 names.
Map["__extendhfsf2"] = RTLIB::FPEXT_F16_F32;
Map["__truncsfhf2"] = RTLIB::FPROUND_F32_F16;

Map["emscripten_return_address"] = RTLIB::RETURN_ADDRESS;
}
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3 changes: 0 additions & 3 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Expand Up @@ -736,9 +736,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f32, Custom);
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f64, Custom);

setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");

// Lower this to MOVMSK plus an AND.
setOperationAction(ISD::FGETSIGN, MVT::i64, Custom);
setOperationAction(ISD::FGETSIGN, MVT::i32, Custom);
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll
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Expand Up @@ -7,7 +7,7 @@ define half @f2h(float %a) {
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl __gnu_f2h_ieee
; CHECK-NEXT: bl __truncsfhf2
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
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24 changes: 12 additions & 12 deletions llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
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Expand Up @@ -60,13 +60,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __addsf3
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
Expand Down Expand Up @@ -148,13 +148,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl __addsf3
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
Expand Down Expand Up @@ -712,22 +712,22 @@ define <2 x half> @test_atomicrmw_fadd_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB7_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl __addsf3
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl __addsf3
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
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Expand Up @@ -62,13 +62,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fmaxf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
Expand Down Expand Up @@ -150,13 +150,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fmaxf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
Expand Down Expand Up @@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmax_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl fmaxf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl fmaxf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
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Expand Up @@ -62,13 +62,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fminf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
Expand Down Expand Up @@ -150,13 +150,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
; SOFTFP-NOLSE-NEXT: mov w22, w0
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w21, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w21
; SOFTFP-NOLSE-NEXT: bl fminf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w0
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
Expand Down Expand Up @@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmin_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w24
; SOFTFP-NOLSE-NEXT: bl fminf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w24, w0
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w25, w0
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
; SOFTFP-NOLSE-NEXT: mov w1, w25
; SOFTFP-NOLSE-NEXT: bl fminf
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
; SOFTFP-NOLSE-NEXT: mov w8, w22
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16
Expand Down
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