Add support for CHERI "purecap" as an environment in target triples. #118927
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For context, CHERI architectures can support two modes: * Hybrid mode, in which capabilities co-exist alongside normal pointers. * Pure capability mode, in which all pointers are replaced with capabilities. Hybrid mode does not require any indication in the target triple, as it is treated the same as any other extension to the parent ISA. Pure cap mode, however, is a different ABI from the native ABI of the parent architecture.
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While I i initially added this for MIPS I'm not 100% convinced it's the best approach to use an environment here as we might want the existing ones too. I'm starting to think using an architecture like riscv64c might be cleaner an less error prone. @jrtc27 what do you think? |
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Yeah this should not be part of the environment, it should be part of the CPU if anything. |
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Environment is way too overloaded already and the cross product of multiple things, this would jus make it even worse. |
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Also, you can’t just go upstreaming random bits of CHERI support. You need to talk to us first about it as CHERI LLVM maintainers, and you need to talk to the upstream LLVM community first. Triples aren’t exactly useful without something behind them… |
FWIW, we're planning to go a similar direction to what you're suggesting for CHERIoT, i.e. defining a |
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Abandoning this at it seems this is not the direction we want. |
For context, CHERI architectures can support two modes:
Hybrid mode does not require any indication in the target triple, as it
is treated the same as any other extension to the parent ISA. Pure cap mode,
however, is a different ABI from the native ABI of the parent architecture.