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PR for llvm/llvm-project#68783 #730

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90e2a53
[PowerPC] Add test for #68783 (NFC)
nikic Oct 11, 2023
ca676a5
[PowerPC] Use zext instead of anyext in custom and combine (#68784)
nikic Oct 12, 2023
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2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15527,7 +15527,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
break;
SDValue ConstOp = DAG.getConstant(Imm, dl, MVT::i32);
SDValue NarrowAnd = DAG.getNode(ISD::AND, dl, MVT::i32, NarrowOp, ConstOp);
return DAG.getAnyExtOrTrunc(NarrowAnd, dl, N->getValueType(0));
return DAG.getZExtOrTrunc(NarrowAnd, dl, N->getValueType(0));
}
case ISD::SHL:
return combineSHL(N, DCI);
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16 changes: 16 additions & 0 deletions llvm/test/CodeGen/PowerPC/and-extend-combine.ll
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@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -ppc-asm-full-reg-names \
; RUN: -mcpu=pwr8 -verify-machineinstrs | FileCheck %s

define dso_local ptr @foo(i32 noundef zeroext %arg, ptr nocapture noundef readonly %arg1, ptr noundef writeonly %arg2) local_unnamed_addr {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %bb
Expand All @@ -21,3 +22,18 @@ bb:
%i8 = getelementptr inbounds i8, ptr %arg2, i64 %i7
ret ptr %i8
}

define void @pr68783(i32 %x, ptr %p) {
; CHECK-LABEL: pr68783:
; CHECK: # %bb.0:
; CHECK-NEXT: rlwinm r3, r3, 31, 24, 31
; CHECK-NEXT: li r5, 0
; CHECK-NEXT: sth r5, 4(r4)
; CHECK-NEXT: stw r3, 0(r4)
; CHECK-NEXT: blr
%lshr = lshr i32 %x, 1
%zext = zext i32 %lshr to i48
%and = and i48 %zext, 255
store i48 %and, ptr %p
ret void
}