Balyasov Ivan. Lab 2 - var 4.

llvm/labs/lab2/balyasov_ivan/CMakeLists.txt

@@ -0,0 +1,9 @@
+if (NOT WIN32 AND NOT CYGWIN)
+  set(PluginName mul_to_bit_shift)
+
+  file(GLOB_RECURSE ALL_SOURCE_FILES *.cpp *.h)
+  add_llvm_pass_plugin(${PluginName} 
+  ${ALL_SOURCE_FILES}     )
+
+  set(LLVM_TEST_DEPENDS ${PluginName} ${LLVM_TEST_DEPENDS} PARENT_SCOPE)
+endif()

llvm/labs/lab2/balyasov_ivan/mul_to_bit_shift.cpp

@@ -0,0 +1,80 @@
+#include "llvm/IR/BasicBlock.h"
+#include "llvm/IR/Function.h"
+#include "llvm/IR/IRBuilder.h"
+#include "llvm/Pass.h"
+#include "llvm/Passes/PassBuilder.h"
+#include "llvm/Passes/PassPlugin.h"
+#include <stack>
+#include <string>
+
+namespace {
+struct mul_to_bit_shift : llvm::PassInfoMixin<mul_to_bit_shift> {
+public:
+  llvm::PreservedAnalyses run(llvm::Function &F,
+                              llvm::FunctionAnalysisManager &FAM) {
+    std::stack<llvm::Instruction *> worklist;
+    for (llvm::BasicBlock &BB : F) {
+      for (llvm::Instruction &Inst : BB) {
+        if (static_cast<std::string>(Inst.getOpcodeName()) != "mul") {
+          continue;
+        }
+        llvm::BinaryOperator *op = llvm::dyn_cast<llvm::BinaryOperator>(&Inst);
+        llvm::IRBuilder<> builder(op);
+        llvm::Value *lhs = op->getOperand(0);
+        llvm::Value *rhs = op->getOperand(1);
+        int lg1 = -2, lg2 = -2;
+        if (llvm::ConstantInt *CIl = llvm::dyn_cast<llvm::ConstantInt>(lhs)) {
+          lg1 = CIl->getValue().exactLogBase2();
+        }
+        if (llvm::ConstantInt *CIr = llvm::dyn_cast<llvm::ConstantInt>(rhs)) {
+          lg2 = CIr->getValue().exactLogBase2();
+        }
+        if (lg1 < lg2) {
+          std::swap(lg1, lg2);
+          std::swap(lhs, rhs);
+        }
+        if (lg1 > -1) {
+          llvm::Value *val;
+          if (lg1 == 0)
+            val = rhs;
+          else {
+            val = builder.CreateShl(rhs,
+                                    llvm::ConstantInt::get(op->getType(), lg1));
+          }
+          op->replaceAllUsesWith(val);
+          worklist.push(&Inst);
+        }
+      }
+      while (!worklist.empty()) {
+        llvm::Instruction *I = worklist.top();
+        I->eraseFromParent();
+        worklist.pop();
+      }
+    }
+
+    auto PA = llvm::PreservedAnalyses::all();
+    return PA;
+  }
+}; // end of struct
+} // end of anonymous namespace
+
+bool registerPipeline(llvm::StringRef Name, llvm::FunctionPassManager &FPM,
+                      llvm::ArrayRef<llvm::PassBuilder::PipelineElement>) {
+  if (Name == "mul_to_bit_shift") {
+    FPM.addPass(mul_to_bit_shift());
+    return true;
+  }
+  return false;
+}
+
+llvm::PassPluginLibraryInfo getMul_To_Bit_ShiftPluginInfo() {
+  return {LLVM_PLUGIN_API_VERSION, "mul_to_bit_shift", LLVM_VERSION_STRING,
+          [](llvm::PassBuilder &PB) {
+            PB.registerPipelineParsingCallback(registerPipeline);
+          }};
+}
+
+extern "C" LLVM_ATTRIBUTE_WEAK llvm::PassPluginLibraryInfo
+llvmGetPassPluginInfo() {
+  return getMul_To_Bit_ShiftPluginInfo();
+}

llvm/test/lab2/balyasov_ivan/test.ll

@@ -0,0 +1,168 @@
+; RUN: opt -load-pass-plugin=%llvmshlibdir/mul_to_bit_shift%shlibext -passes=mul_to_bit_shift -S %s | FileCheck %s
+
+;int f0(int a){
+;    int c = a + 4;
+;    return c;
+;}
+
+;int f1(int a){
+;    int c = a * 4;
+;    return c;
+;}
+
+;void f2(){
+;    int a = 3;
+;    int c = a * 4;
+;}
+
+;void f3(){
+;    int a = 3;
+;    int c = 4 * a;
+;}
+
+;void f4(){
+;    int a = 4;
+;    int c = a * 1;
+;}
+
+;void f5(){
+;    int a = 3;
+;    int c = 0 * a;
+;}
+
+;int f6(int a){
+;    int b = 6;
+;    int c = a * b;
+;    return c;
+;}
+
+;void f7(){
+;    int a = 4;
+;    int c = a * 3;
+;}
+
+define dso_local i32 @f0(i32 noundef %0) #0 {
+  %2 = alloca i32, align 4
+  %3 = alloca i32, align 4
+  store i32 %0, ptr %2, align 4
+  %4 = load i32, ptr %2, align 4
+  %5 = add nsw i32 %4, 4
+  store i32 %5, ptr %3, align 4
+  %6 = load i32, ptr %3, align 4
+  ret i32 %6
+}
+
+; CHECK-LABEL: @f0
+; CHECK: %4 = load i32, ptr %2, align 4
+; CHECK-NEXT: %5 = add nsw i32 %4, 4
+; CHECK-NEXT: store i32 %5, ptr %3, align 4
+
+define dso_local i32 @f1(i32 noundef %0) #0 {
+  %2 = alloca i32, align 4
+  %3 = alloca i32, align 4
+  store i32 %0, ptr %2, align 4
+  %4 = load i32, ptr %2, align 4
+  %5 = mul nsw i32 %4, 4
+  store i32 %5, ptr %3, align 4
+  %6 = load i32, ptr %3, align 4
+  ret i32 %6
+}
+
+; CHECK-LABEL: @f1
+; CHECK: %4 = load i32, ptr %2, align 4
+; CHECK-NEXT: %5 = shl i32 %4, 2
+; CHECK-NEXT: store i32 %5, ptr %3, align 4
+
+define dso_local void @f2() #0 {
+  %1 = alloca i32, align 4
+  %2 = alloca i32, align 4
+  store i32 3, ptr %1, align 4
+  %3 = load i32, ptr %1, align 4
+  %4 = mul nsw i32 %3, 4
+  store i32 %4, ptr %2, align 4
+  ret void
+}
+
+; CHECK-LABEL: @f2
+; CHECK: %3 = load i32, ptr %1, align 4
+; CHECK-NEXT: %4 = shl i32 %3, 2
+; CHECK-NEXT: store i32 %4, ptr %2, align 4
+
+define dso_local void @f3() #0 {
+  %1 = alloca i32, align 4
+  %2 = alloca i32, align 4
+  store i32 3, ptr %1, align 4
+  %3 = load i32, ptr %1, align 4
+  %4 = mul nsw i32 4, %3
+  store i32 %4, ptr %2, align 4
+  ret void
+}
+
+; CHECK-LABEL: @f3
+; CHECK: %3 = load i32, ptr %1, align 4
+; CHECK-NEXT: %4 = shl i32 %3, 2
+; CHECK-NEXT: store i32 %4, ptr %2, align 4
+
+define dso_local void @f4() #0 {
+  %1 = alloca i32, align 4
+  %2 = alloca i32, align 4
+  store i32 4, ptr %1, align 4
+  %3 = load i32, ptr %1, align 4
+  %4 = mul nsw i32 %3, 1
+  store i32 %4, ptr %2, align 4
+  ret void
+}
+
+; CHECK-LABEL: @f4
+; CHECK: %3 = load i32, ptr %1, align 4
+; CHECK-NEXT: store i32 %3, ptr %2, align 4
+
+define dso_local void @f5() #0 {
+  %1 = alloca i32, align 4
+  %2 = alloca i32, align 4
+  store i32 3, ptr %1, align 4
+  %3 = load i32, ptr %1, align 4
+  %4 = mul nsw i32 0, %3
+  store i32 %4, ptr %2, align 4
+  ret void
+}
+
+; CHECK-LABEL: @f5
+; CHECK: %3 = load i32, ptr %1, align 4
+; CHECK-NEXT: %4 = mul nsw i32 0, %3
+; CHECK-NEXT: store i32 %4, ptr %2, align 4
+
+define dso_local i32 @f6(i32 noundef %0) #0 {
+  %2 = alloca i32, align 4
+  %3 = alloca i32, align 4
+  %4 = alloca i32, align 4
+  store i32 %0, ptr %2, align 4
+  store i32 6, ptr %3, align 4
+  %5 = load i32, ptr %2, align 4
+  %6 = load i32, ptr %3, align 4
+  %7 = mul nsw i32 %5, %6
+  store i32 %7, ptr %4, align 4
+  %8 = load i32, ptr %4, align 4
+  ret i32 %8
+}
+
+; CHECK-LABEL: @f6
+; CHECK: %6 = load i32, ptr %3, align 4
+; CHECK-NEXT: %7 = mul nsw i32 %5, %6
+; CHECK-NEXT: store i32 %7, ptr %4, align 4
+
+
+define dso_local void @f7() #0 {
+  %1 = alloca i32, align 4
+  %2 = alloca i32, align 4
+  store i32 4, ptr %1, align 4
+  %3 = load i32, ptr %1, align 4
+  %4 = mul nsw i32 %3, 3
+  store i32 %4, ptr %2, align 4
+  ret void
+}
+
+; CHECK-LABEL: @f7
+; CHECK: %3 = load i32, ptr %1, align 4
+; CHECK-NEXT: %4 = mul nsw i32 %3, 3
+; CHECK-NEXT: store i32 %4, ptr %2, align 4