alpha.7

Author: burrbull

CHANGELOG.md

@@ -7,12 +7,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
-### Added
-
-- Support of embedded-hal 1.0.0-alpha.6 [#388]
-
-[#388]: https://github.com/stm32-rs/stm32f4xx-hal/pull/388
-
 ### Changed
 
 - Add inherent impl of `embedded_hal::Pwm` methods on `Pwm`s [#439]
@@ -24,7 +18,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Pwm channels now constants [#432]
 - Add channel events, make Event use bitflags (simplify interrupt handling) [#425]
 - reexport `digital::v2::PinState` again [#428]
-- reexport `digital::v2::PinState` again
 - Timer impls with time based on `fugit` moved to `fugit` module, added `Pwm` and `fugit-timer` impls [#423]
 
 ### Fixed
@@ -33,6 +26,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Added
 
+- Support of embedded-hal 1.0.0-alpha.7
 - Aliases for peripheral wrappers [#434]
 - `WithPwm` trait implemented for timers with channels (internals) [#425]
 - `Pwm` struct with `split` method and implementation of embedded-hal::Pwm (similar to f1xx-hal) [#425]

Cargo.toml

@@ -39,7 +39,7 @@ embedded-dma = "0.2.0"
 bare-metal = { version = "1" }
 cast = { default-features = false, version = "0.3.0" }
 void = { default-features = false, version = "1.0.2" }
-embedded-hal = { features = ["unproven"], version = "0.2.6" }
+embedded-hal = { features = ["unproven"], version = "0.2.7" }
 display-interface = { version = "0.4.1", optional = true }
 fugit = "0.3.3"
 fugit-timer = "0.1.3"
@@ -52,7 +52,7 @@ version = "0.3"
 default-features = false
 
 [dependencies.embedded-hal-one]
-version = "=1.0.0-alpha.6"
+version = "1.0.0-alpha.7"
 package = "embedded-hal"
 
 [dependencies.stm32_i2s_v12x]

src/fmpi2c/hal_1.rs

@@ -1,148 +1,67 @@
+use embedded_hal_one::i2c::ErrorType;
+
+impl<I2C, PINS> ErrorType for super::FMPI2c<I2C, PINS> {
+    type Error = super::Error;
+}
+
 mod blocking {
-    use super::super::{fmpi2c1, Error, FMPI2c};
+    use super::super::{fmpi2c1, FMPI2c};
     use core::ops::Deref;
-    use embedded_hal_one::i2c::blocking::{Read, Write, WriteRead};
+    use embedded_hal_one::i2c::blocking::Operation;
 
-    impl<I2C, PINS> WriteRead for FMPI2c<I2C, PINS>
+    impl<I2C, PINS> embedded_hal_one::i2c::blocking::I2c for FMPI2c<I2C, PINS>
     where
         I2C: Deref<Target = fmpi2c1::RegisterBlock>,
     {
-        type Error = Error;
-
-        fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> {
-            // Set up current slave address for writing and disable autoending
-            self.i2c.cr2.modify(|_, w| {
-                w.sadd()
-                    .bits(u16::from(addr) << 1)
-                    .nbytes()
-                    .bits(bytes.len() as u8)
-                    .rd_wrn()
-                    .clear_bit()
-                    .autoend()
-                    .clear_bit()
-            });
-
-            // Send a START condition
-            self.i2c.cr2.modify(|_, w| w.start().set_bit());
-
-            // Wait until the transmit buffer is empty and there hasn't been any error condition
-            while {
-                let isr = self.i2c.isr.read();
-                self.check_and_clear_error_flags(&isr)
-                    .map_err(Error::nack_addr)?;
-                isr.txis().bit_is_clear() && isr.tc().bit_is_clear()
-            } {}
-
-            // Send out all individual bytes
-            for c in bytes {
-                self.send_byte(*c)?;
-            }
-
-            // Wait until data was sent
-            while {
-                let isr = self.i2c.isr.read();
-                self.check_and_clear_error_flags(&isr)
-                    .map_err(Error::nack_data)?;
-                isr.tc().bit_is_clear()
-            } {}
-
-            // Set up current address for reading
-            self.i2c.cr2.modify(|_, w| {
-                w.sadd()
-                    .bits(u16::from(addr) << 1)
-                    .nbytes()
-                    .bits(buffer.len() as u8)
-                    .rd_wrn()
-                    .set_bit()
-            });
-
-            // Send another START condition
-            self.i2c.cr2.modify(|_, w| w.start().set_bit());
-
-            // Send the autoend after setting the start to get a restart
-            self.i2c.cr2.modify(|_, w| w.autoend().set_bit());
-
-            // Now read in all bytes
-            for c in buffer.iter_mut() {
-                *c = self.recv_byte()?;
-            }
-
-            // Check and clear flags if they somehow ended up set
-            self.check_and_clear_error_flags(&self.i2c.isr.read())
-                .map_err(Error::nack_data)?;
-
-            Ok(())
+        fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+            self.read(addr, buffer)
         }
-    }
 
-    impl<I2C, PINS> Read for FMPI2c<I2C, PINS>
-    where
-        I2C: Deref<Target = fmpi2c1::RegisterBlock>,
-    {
-        type Error = Error;
-
-        fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> {
-            // Set up current address for reading
-            self.i2c.cr2.modify(|_, w| {
-                w.sadd()
-                    .bits(u16::from(addr) << 1)
-                    .nbytes()
-                    .bits(buffer.len() as u8)
-                    .rd_wrn()
-                    .set_bit()
-            });
-
-            // Send a START condition
-            self.i2c.cr2.modify(|_, w| w.start().set_bit());
-
-            // Send the autoend after setting the start to get a restart
-            self.i2c.cr2.modify(|_, w| w.autoend().set_bit());
-
-            // Now read in all bytes
-            for c in buffer.iter_mut() {
-                *c = self.recv_byte()?;
-            }
-
-            // Check and clear flags if they somehow ended up set
-            self.check_and_clear_error_flags(&self.i2c.isr.read())
-                .map_err(Error::nack_data)?;
-
-            Ok(())
+        fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
+            self.write(addr, bytes)
         }
-    }
 
-    impl<I2C, PINS> Write for FMPI2c<I2C, PINS>
-    where
-        I2C: Deref<Target = fmpi2c1::RegisterBlock>,
-    {
-        type Error = Error;
-
-        fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
-            // Set up current slave address for writing and enable autoending
-            self.i2c.cr2.modify(|_, w| {
-                w.sadd()
-                    .bits(u16::from(addr) << 1)
-                    .nbytes()
-                    .bits(bytes.len() as u8)
-                    .rd_wrn()
-                    .clear_bit()
-                    .autoend()
-                    .set_bit()
-            });
+        fn write_iter<B>(&mut self, _addr: u8, _bytes: B) -> Result<(), Self::Error>
+        where
+            B: IntoIterator<Item = u8>,
+        {
+            todo!()
+        }
 
-            // Send a START condition
-            self.i2c.cr2.modify(|_, w| w.start().set_bit());
+        fn write_read(
+            &mut self,
+            addr: u8,
+            bytes: &[u8],
+            buffer: &mut [u8],
+        ) -> Result<(), Self::Error> {
+            self.write_read(addr, bytes, buffer)
+        }
 
-            // Send out all individual bytes
-            for c in bytes {
-                self.send_byte(*c)?;
-            }
+        fn write_iter_read<B>(
+            &mut self,
+            _addr: u8,
+            _bytes: B,
+            _buffer: &mut [u8],
+        ) -> Result<(), Self::Error>
+        where
+            B: IntoIterator<Item = u8>,
+        {
+            todo!()
+        }
 
-            // Check and clear flags if they somehow ended up set
-            self.check_and_clear_error_flags(&self.i2c.isr.read())
-                .map_err(Error::nack_data)?;
+        fn transaction<'a>(
+            &mut self,
+            _addr: u8,
+            _operations: &mut [Operation<'a>],
+        ) -> Result<(), Self::Error> {
+            todo!()
+        }
 
-            Ok(())
+        fn transaction_iter<'a, O>(&mut self, _addr: u8, _operations: O) -> Result<(), Self::Error>
+        where
+            O: IntoIterator<Item = Operation<'a>>,
+        {
+            todo!()
         }
     }
 }

src/fugit/hal_1.rs

@@ -0,0 +1,17 @@
+use super::{Delay, Error, Instance};
+
+use embedded_hal_one::delay::blocking::DelayUs;
+
+use fugit::ExtU32;
+
+impl<TIM: Instance, const FREQ: u32> DelayUs for Delay<TIM, FREQ> {
+    type Error = Error;
+
+    fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
+        self.delay(us.micros())
+    }
+
+    fn delay_ms(&mut self, ms: u32) -> Result<(), Self::Error> {
+        self.delay(ms.millis())
+    }
+}

src/fugit/mod.rs

@@ -25,6 +25,7 @@ pub mod pwm;
 pub use pwm::*;
 
 mod hal_02;
+mod hal_1;
 
 /// Timer wrapper
 pub struct Timer<TIM, const FREQ: u32> {