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RISC-V RVV intrinsics are missing #1817

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nazar-pc opened this issue Jun 2, 2025 · 3 comments
Open

RISC-V RVV intrinsics are missing #1817

nazar-pc opened this issue Jun 2, 2025 · 3 comments

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@nazar-pc
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nazar-pc commented Jun 2, 2025

I think https://github.com/riscv-non-isa/rvv-intrinsic-doc is the place to get them, v1.0 was ratified on April 25 2025.
It would be really nice to get them into standard library now that RISC-V hardware becomes more common and there are various RISC-V-based VMs out there (for example in blockchain space).

@sayantn
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sayantn commented Jun 2, 2025

Doesn't RVV need scalable vectors (i.e. fixed length vectors whole length is not known until runtime)? Then it (and AArch64 SVE) is blocked on compiler support for scalable vectors

@nazar-pc
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nazar-pc commented Jun 2, 2025

Yes, I believe at least some of it might be blocked for the same reasons as SVE, but hopefully with rust-lang/rust-project-goals#270 it will be unblocked relatively soon

@sayantn
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sayantn commented Jun 2, 2025

Oh nice, I didn't know we had a project for SVE. With the amount of traction I am noticing on that I think we will soon have scalable vectors ❤️. Afaik RVV is not too different from SVE, so implementation of the intrinsics will most probably be quick

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