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remove spsc / pool / mpmc modules on targets w/o atomic / CAS support
closes #123
1 parent 909251d commit 44c66a7

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9 files changed

+223
-151
lines changed

9 files changed

+223
-151
lines changed

build.rs

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@@ -19,5 +19,26 @@ fn main() -> Result<(), Box<dyn Error>> {
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println!("cargo:rustc-cfg=armv8m_main");
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}
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// built-in targets with no atomic / CAS support as of nightly-2019-12-17
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// see the `no-atomics.sh` / `no-cas.sh` script sitting next to this file
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match &target[..] {
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"thumbv6m-none-eabi"
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| "msp430-none-elf"
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| "riscv32i-unknown-none-elf"
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| "riscv32imc-unknown-none-elf" => {}
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_ => {
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println!("cargo:rustc-cfg=has_cas");
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}
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};
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match &target[..] {
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"msp430-none-elf" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {}
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_ => {
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println!("cargo:rustc-cfg=has_atomics");
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}
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};
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Ok(())
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}

no-atomics.sh

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#!/bin/bash
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set -euo pipefail
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main() {
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IFS='
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'
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for t in $(rustc --print target-list); do
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rustc +nightly --print cfg --target $t | grep 'target_has_atomic_load_store=' >/dev/null || echo $t
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done
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}
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main

no-cas.sh

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#!/bin/bash
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set -euo pipefail
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main() {
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IFS='
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'
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for t in $(rustc --print target-list); do
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rustc +nightly --print cfg --target $t | grep 'target_has_atomic=' >/dev/null || echo $t
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done
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}
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main

src/i.rs

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@@ -2,6 +2,7 @@
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use core::{marker::PhantomData, mem::MaybeUninit};
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#[cfg(has_atomics)]
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use crate::spsc::{Atomic, MultiCore};
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/// `const-fn` version of [`BinaryHeap`](../binary_heap/struct.BinaryHeap.html)
@@ -16,6 +17,7 @@ pub struct LinearMap<A> {
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}
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/// `const-fn` version of [`spsc::Queue`](../spsc/struct.Queue.html)
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#[cfg(has_atomics)]
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pub struct Queue<A, U = usize, C = MultiCore> {
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// this is from where we dequeue items
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pub(crate) head: Atomic<U, C>,

src/lib.rs

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@@ -89,10 +89,11 @@ mod ser;
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pub mod binary_heap;
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pub mod i;
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#[cfg(all(not(armv6m), feature = "cas"))]
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#[cfg(all(has_cas, feature = "cas"))]
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pub mod mpmc;
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#[cfg(all(not(armv6m), feature = "cas"))]
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#[cfg(all(has_cas, feature = "cas"))]
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pub mod pool;
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#[cfg(has_atomics)]
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pub mod spsc;
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mod sealed;

src/mpmc.rs

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@@ -1,5 +1,7 @@
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//! A fixed capacity Multiple-Producer Multiple-Consumer (MPMC) lock-free queue
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//!
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//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M
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//!
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//! # Example
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//!
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//! This queue can be constructed in "const context". Placing it in a `static` variable lets *all*

src/pool/mod.rs

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@@ -1,5 +1,7 @@
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//! A heap-less, interrupt-safe, lock-free memory pool (\*)
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//!
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//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M
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//!
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//! (\*) Currently, the implementation is only lock-free *and* `Sync` on ARMv7-M devices
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//!
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//! # Examples

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