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ryankurteeldruin
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Co-authored-by: Diego Barrios Romero <[email protected]>
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src/blocking/spi.rs

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -38,17 +38,17 @@ pub trait WriteIter<W> {
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WI: IntoIterator<Item = W>;
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}
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41-
/// ManagedCS marker trait indicates the CS pin is managed by the underlying driver.
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/// `ManagedCs` marker trait indicates the chip-select (CS) pin is managed by the underlying driver.
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///
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/// This specifies that all `spi` operations will be preceded by asserting the CS pin,
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/// This specifies that all SPI operations will be preceded by asserting the CS pin,
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/// and followed by de-asserting the CS pin, prior to returning from the method.
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///
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/// This is important for shared bus access to ensure that only one CS can be asserted
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/// at a given time. Drivers should require this (and not manage their own CS pins)
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/// in order to support shared use.
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///
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/// To chain operations within one transaction see [Transactional].
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/// For or a convenience wrapper defining this type for non-shared / exclusive use
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/// For a convenience wrapper defining this type for non-shared / exclusive use
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/// see [`SpiWithCs`](spi_with_cs::SpiWithCs).
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pub trait ManagedCs {}
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@@ -66,7 +66,7 @@ pub enum Operation<'a, W: 'static> {
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/// Transactional trait allows multiple actions to be executed
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/// as part of a single SPI transaction.
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///
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/// This API guarantees ordering, ensuring operations from
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/// This API guarantees grouping, ensuring operations from
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/// different sources will not be interleaved on a shared bus.
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/// [ManagedCs]
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pub trait Transactional<W: 'static> {
@@ -106,7 +106,7 @@ pub mod spi_with_cs {
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Pin(PinError),
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}
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/// ManagedCS marker trait indicates Chip Select management is automatic
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/// `ManagedCs` marker trait indicates chip-select management is automatic
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impl<Spi, SpiError, Pin, PinError> ManagedCs for SpiWithCs<Spi, SpiError, Pin, PinError> {}
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impl<Spi, SpiError, Pin, PinError> SpiWithCs<Spi, SpiError, Pin, PinError>
@@ -115,7 +115,7 @@ pub mod spi_with_cs {
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SpiError: Debug,
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PinError: Debug,
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{
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/// Create a new SpiWithCS wrapper with the provided Spi and Pin
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/// Create a new `SpiWithCs` wrapper with the provided SPI bus and Pin
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pub fn new(spi: Spi, cs: Pin) -> Self {
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Self {
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spi,
@@ -125,13 +125,14 @@ pub mod spi_with_cs {
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}
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}
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/// Fetch references to the inner Spi and Pin types.
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/// Fetch references to the inner SPI bus and Pin types
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///
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/// Note that using these directly will violate the `ManagedCs` constraint.
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pub fn inner(&mut self) -> (&mut Spi, &mut Pin) {
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(&mut self.spi, &mut self.cs)
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}
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/// Destroy the SpiWithCs wrapper, returning the bus and pin objects
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/// Destroy the `SpiWithCs` wrapper, returning the SPI bus and Pin objects
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pub fn destroy(self) -> (Spi, Pin) {
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(self.spi, self.cs)
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}
@@ -157,7 +158,7 @@ pub mod spi_with_cs {
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// Deassert CS
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self.cs.set_high().map_err(SpiWithCsError::Pin)?;
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// Return failures
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// Return transfer result or failure
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spi_result
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}
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}
@@ -182,7 +183,7 @@ pub mod spi_with_cs {
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// Deassert CS
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self.cs.set_high().map_err(SpiWithCsError::Pin)?;
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// Return failures
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// Return transfer result or failure
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spi_result
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}
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}
@@ -210,7 +211,7 @@ pub mod spi_with_cs {
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// Deassert CS
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self.cs.set_high().map_err(SpiWithCsError::Pin)?;
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// Return failures
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// Return transfer result or failure
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spi_result
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}
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}

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