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1 parent 26cae65 commit 4bf9ef4Copy full SHA for 4bf9ef4
cortex-m-rt/src/lib.rs
@@ -521,8 +521,8 @@ cfg_global_asm! {
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"ldr r0, =_stack_start
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msr msp, r0",
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- // If enabled, initialize RAM with zeros. This is normally not necessary but might be required
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- // on custom hardware.
+ // If enabled, initialize RAM with zeros. This is not usually required, but might be necessary
+ // to properly initialize checksum-based memory integrity measures on safety-critical hardware.
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#[cfg(feature = "zero-init-ram")]
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"ldr r0, =_ram_start
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ldr r1, =_ram_end
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