@@ -667,6 +667,48 @@ static const u32 colorspace_coeffs[2][DRM_COLOR_ENCODING_MAX][3] = {
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}
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};
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+ static u32 vc4_hvs4_get_alpha_blend_mode (struct drm_plane_state * state )
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+ {
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+ if (!state -> fb -> format -> has_alpha )
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+ return VC4_SET_FIELD (SCALER_POS2_ALPHA_MODE_FIXED ,
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+ SCALER_POS2_ALPHA_MODE );
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+
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+ switch (state -> pixel_blend_mode ) {
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+ case DRM_MODE_BLEND_PIXEL_NONE :
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+ return VC4_SET_FIELD (SCALER_POS2_ALPHA_MODE_FIXED ,
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+ SCALER_POS2_ALPHA_MODE );
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+ default :
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+ case DRM_MODE_BLEND_PREMULTI :
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+ return VC4_SET_FIELD (SCALER_POS2_ALPHA_MODE_PIPELINE ,
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+ SCALER_POS2_ALPHA_MODE ) |
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+ SCALER_POS2_ALPHA_PREMULT ;
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+ case DRM_MODE_BLEND_COVERAGE :
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+ return VC4_SET_FIELD (SCALER_POS2_ALPHA_MODE_PIPELINE ,
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+ SCALER_POS2_ALPHA_MODE );
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+ }
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+ }
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+
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+ static u32 vc4_hvs5_get_alpha_blend_mode (struct drm_plane_state * state )
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+ {
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+ if (!state -> fb -> format -> has_alpha )
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+ return VC4_SET_FIELD (SCALER5_CTL2_ALPHA_MODE_FIXED ,
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+ SCALER5_CTL2_ALPHA_MODE );
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+
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+ switch (state -> pixel_blend_mode ) {
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+ case DRM_MODE_BLEND_PIXEL_NONE :
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+ return VC4_SET_FIELD (SCALER5_CTL2_ALPHA_MODE_FIXED ,
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+ SCALER5_CTL2_ALPHA_MODE );
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+ default :
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+ case DRM_MODE_BLEND_PREMULTI :
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+ return VC4_SET_FIELD (SCALER5_CTL2_ALPHA_MODE_PIPELINE ,
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+ SCALER5_CTL2_ALPHA_MODE ) |
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+ SCALER5_CTL2_ALPHA_PREMULT ;
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+ case DRM_MODE_BLEND_COVERAGE :
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+ return VC4_SET_FIELD (SCALER5_CTL2_ALPHA_MODE_PIPELINE ,
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+ SCALER5_CTL2_ALPHA_MODE );
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+ }
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+ }
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+
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/* Writes out a full display list for an active plane to the plane's
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* private dlist state.
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*/
@@ -928,13 +970,8 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
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/* Position Word 2: Source Image Size, Alpha */
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vc4_state -> pos2_offset = vc4_state -> dlist_count ;
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vc4_dlist_write (vc4_state ,
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- VC4_SET_FIELD (fb -> format -> has_alpha ?
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- SCALER_POS2_ALPHA_MODE_PIPELINE :
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- SCALER_POS2_ALPHA_MODE_FIXED ,
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- SCALER_POS2_ALPHA_MODE ) |
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(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0 ) |
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- (fb -> format -> has_alpha ?
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- SCALER_POS2_ALPHA_PREMULT : 0 ) |
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+ vc4_hvs4_get_alpha_blend_mode (state ) |
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VC4_SET_FIELD (vc4_state -> src_w [0 ],
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SCALER_POS2_WIDTH ) |
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VC4_SET_FIELD (vc4_state -> src_h [0 ],
@@ -979,14 +1016,9 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
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vc4_dlist_write (vc4_state ,
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VC4_SET_FIELD (state -> alpha >> 4 ,
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SCALER5_CTL2_ALPHA ) |
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- (fb -> format -> has_alpha ?
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- SCALER5_CTL2_ALPHA_PREMULT : 0 ) |
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+ vc4_hvs5_get_alpha_blend_mode (state ) |
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(mix_plane_alpha ?
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- SCALER5_CTL2_ALPHA_MIX : 0 ) |
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- VC4_SET_FIELD (fb -> format -> has_alpha ?
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- SCALER5_CTL2_ALPHA_MODE_PIPELINE :
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- SCALER5_CTL2_ALPHA_MODE_FIXED ,
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- SCALER5_CTL2_ALPHA_MODE )
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+ SCALER5_CTL2_ALPHA_MIX : 0 )
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);
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/* Position Word 1: Scaled Image Dimensions. */
@@ -1470,6 +1502,10 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
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drm_plane_helper_add (plane , & vc4_plane_helper_funcs );
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drm_plane_create_alpha_property (plane );
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+ drm_plane_create_blend_mode_property (plane ,
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+ BIT (DRM_MODE_BLEND_PIXEL_NONE ) |
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+ BIT (DRM_MODE_BLEND_PREMULTI ) |
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+ BIT (DRM_MODE_BLEND_COVERAGE ));
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drm_plane_create_rotation_property (plane , DRM_MODE_ROTATE_0 ,
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DRM_MODE_ROTATE_0 |
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DRM_MODE_ROTATE_180 |
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