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Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt]
Disintegrate asm/system.h for Unicore32. (Compilation successful) The implementation details are not changed, but only splitted. BTW, some codestyles are adjusted. Signed-off-by: David Howells <[email protected]> Signed-off-by: Guan Xuetao <[email protected]>
1 parent bd119c6 commit 8978bfd

22 files changed

+225
-173
lines changed

‎arch/unicore32/include/asm/Kbuild

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Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@ include include/asm-generic/Kbuild.asm
33
generic-y += atomic.h
44
generic-y += auxvec.h
55
generic-y += bitsperlong.h
6-
generic-y += bug.h
76
generic-y += bugs.h
87
generic-y += cputime.h
98
generic-y += current.h

‎arch/unicore32/include/asm/barrier.h

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@@ -0,0 +1,28 @@
1+
/*
2+
* Memory barrier implementations for PKUnity SoC and UniCore ISA
3+
*
4+
* Copyright (C) 2001-2012 GUAN Xue-tao
5+
*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
9+
*/
10+
#ifndef __UNICORE_BARRIER_H__
11+
#define __UNICORE_BARRIER_H__
12+
13+
#define isb() __asm__ __volatile__ ("" : : : "memory")
14+
#define dsb() __asm__ __volatile__ ("" : : : "memory")
15+
#define dmb() __asm__ __volatile__ ("" : : : "memory")
16+
17+
#define mb() barrier()
18+
#define rmb() barrier()
19+
#define wmb() barrier()
20+
#define smp_mb() barrier()
21+
#define smp_rmb() barrier()
22+
#define smp_wmb() barrier()
23+
#define read_barrier_depends() do { } while (0)
24+
#define smp_read_barrier_depends() do { } while (0)
25+
26+
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
27+
28+
#endif /* __UNICORE_BARRIER_H__ */

‎arch/unicore32/include/asm/bug.h

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@@ -0,0 +1,27 @@
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/*
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* Bug handling for PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2012 GUAN Xue-tao
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*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
9+
*/
10+
#ifndef __UNICORE_BUG_H__
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#define __UNICORE_BUG_H__
12+
13+
#include <asm-generic/bug.h>
14+
15+
struct pt_regs;
16+
struct siginfo;
17+
18+
extern void die(const char *msg, struct pt_regs *regs, int err);
19+
extern void uc32_notify_die(const char *str, struct pt_regs *regs,
20+
struct siginfo *info, unsigned long err, unsigned long trap);
21+
22+
extern asmlinkage void __backtrace(void);
23+
extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
24+
25+
extern void __show_regs(struct pt_regs *);
26+
27+
#endif /* __UNICORE_BUG_H__ */

‎arch/unicore32/include/asm/cmpxchg.h

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@@ -0,0 +1,61 @@
1+
/*
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* Atomics xchg/cmpxchg for PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2012 GUAN Xue-tao
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*
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* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
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*/
10+
#ifndef __UNICORE_CMPXCHG_H__
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#define __UNICORE_CMPXCHG_H__
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/*
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* Generate a link failure on undefined symbol if the pointer points to a value
15+
* of unsupported size.
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*/
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extern void __xchg_bad_pointer(void);
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
20+
int size)
21+
{
22+
unsigned long ret;
23+
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switch (size) {
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case 1:
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asm volatile("swapb %0, %1, [%2]"
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: "=&r" (ret)
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: "r" (x), "r" (ptr)
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: "memory", "cc");
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break;
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case 4:
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asm volatile("swapw %0, %1, [%2]"
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: "=&r" (ret)
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: "r" (x), "r" (ptr)
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: "memory", "cc");
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break;
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default:
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ret = __xchg_bad_pointer();
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}
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return ret;
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}
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#define xchg(ptr, x) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
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#include <asm-generic/cmpxchg-local.h>
48+
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/*
50+
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
51+
* them available.
52+
*/
53+
#define cmpxchg_local(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
55+
(unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
56+
#define cmpxchg64_local(ptr, o, n) \
57+
__cmpxchg64_local_generic((ptr), (o), (n))
58+
59+
#include <asm-generic/cmpxchg.h>
60+
61+
#endif /* __UNICORE_CMPXCHG_H__ */

‎arch/unicore32/include/asm/exec.h

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@@ -0,0 +1,15 @@
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/*
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* Process execution bits for PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2012 GUAN Xue-tao
5+
*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
9+
*/
10+
#ifndef __UNICORE_EXEC_H__
11+
#define __UNICORE_EXEC_H__
12+
13+
#define arch_align_stack(x) (x)
14+
15+
#endif /* __UNICORE_EXEC_H__ */

‎arch/unicore32/include/asm/hwdef-copro.h

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@@ -0,0 +1,48 @@
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/*
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* Co-processor register definitions for PKUnity SoC and UniCore ISA
3+
*
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* Copyright (C) 2001-2012 GUAN Xue-tao
5+
*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
9+
*/
10+
#ifndef __UNICORE_HWDEF_COPRO_H__
11+
#define __UNICORE_HWDEF_COPRO_H__
12+
13+
/*
14+
* Control Register bits (CP#0 CR1)
15+
*/
16+
#define CR_M (1 << 0) /* MMU enable */
17+
#define CR_A (1 << 1) /* Alignment abort enable */
18+
#define CR_D (1 << 2) /* Dcache enable */
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#define CR_I (1 << 3) /* Icache enable */
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#define CR_B (1 << 4) /* Dcache write mechanism: write back */
21+
#define CR_T (1 << 5) /* Burst enable */
22+
#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
23+
24+
#ifndef __ASSEMBLY__
25+
26+
#define vectors_high() (cr_alignment & CR_V)
27+
28+
extern unsigned long cr_no_alignment; /* defined in entry.S */
29+
extern unsigned long cr_alignment; /* defined in entry.S */
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31+
static inline unsigned int get_cr(void)
32+
{
33+
unsigned int val;
34+
asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
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return val;
36+
}
37+
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static inline void set_cr(unsigned int val)
39+
{
40+
asm volatile("movc p0.c1, %0, #0" : : "r" (val) : "cc");
41+
isb();
42+
}
43+
44+
extern void adjust_cr(unsigned long mask, unsigned long set);
45+
46+
#endif /* __ASSEMBLY__ */
47+
48+
#endif /* __UNICORE_HWDEF_COPRO_H__ */

‎arch/unicore32/include/asm/io.h

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Original file line numberDiff line numberDiff line change
@@ -16,7 +16,6 @@
1616

1717
#include <asm/byteorder.h>
1818
#include <asm/memory.h>
19-
#include <asm/system.h>
2019

2120
#define PCI_IOBASE PKUNITY_PCILIO_BASE
2221
#include <asm-generic/io.h>

‎arch/unicore32/include/asm/switch_to.h

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/*
2+
* Task switching for PKUnity SoC and UniCore ISA
3+
*
4+
* Copyright (C) 2001-2012 GUAN Xue-tao
5+
*
6+
* This program is free software; you can redistribute it and/or modify
7+
* it under the terms of the GNU General Public License version 2 as
8+
* published by the Free Software Foundation.
9+
*/
10+
#ifndef __UNICORE_SWITCH_TO_H__
11+
#define __UNICORE_SWITCH_TO_H__
12+
13+
struct task_struct;
14+
struct thread_info;
15+
16+
/*
17+
* switch_to(prev, next) should switch from task `prev' to `next'
18+
* `prev' will never be the same as `next'. schedule() itself
19+
* contains the memory barrier to tell GCC not to cache `current'.
20+
*/
21+
extern struct task_struct *__switch_to(struct task_struct *,
22+
struct thread_info *, struct thread_info *);
23+
24+
#define switch_to(prev, next, last) \
25+
do { \
26+
last = __switch_to(prev, task_thread_info(prev), \
27+
task_thread_info(next)); \
28+
} while (0)
29+
30+
#endif /* __UNICORE_SWITCH_TO_H__ */

‎arch/unicore32/include/asm/system.h

Lines changed: 5 additions & 161 deletions
Original file line numberDiff line numberDiff line change
@@ -1,161 +1,5 @@
1-
/*
2-
* linux/arch/unicore32/include/asm/system.h
3-
*
4-
* Code specific to PKUnity SoC and UniCore ISA
5-
*
6-
* Copyright (C) 2001-2010 GUAN Xue-tao
7-
*
8-
* This program is free software; you can redistribute it and/or modify
9-
* it under the terms of the GNU General Public License version 2 as
10-
* published by the Free Software Foundation.
11-
*/
12-
#ifndef __UNICORE_SYSTEM_H__
13-
#define __UNICORE_SYSTEM_H__
14-
15-
#ifdef __KERNEL__
16-
17-
/*
18-
* CR1 bits (CP#0 CR1)
19-
*/
20-
#define CR_M (1 << 0) /* MMU enable */
21-
#define CR_A (1 << 1) /* Alignment abort enable */
22-
#define CR_D (1 << 2) /* Dcache enable */
23-
#define CR_I (1 << 3) /* Icache enable */
24-
#define CR_B (1 << 4) /* Dcache write mechanism: write back */
25-
#define CR_T (1 << 5) /* Burst enable */
26-
#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
27-
28-
#ifndef __ASSEMBLY__
29-
30-
#include <linux/linkage.h>
31-
#include <linux/irqflags.h>
32-
33-
struct thread_info;
34-
struct task_struct;
35-
36-
struct pt_regs;
37-
38-
void die(const char *msg, struct pt_regs *regs, int err);
39-
40-
struct siginfo;
41-
void uc32_notify_die(const char *str, struct pt_regs *regs,
42-
struct siginfo *info, unsigned long err, unsigned long trap);
43-
44-
void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
45-
struct pt_regs *),
46-
int sig, int code, const char *name);
47-
48-
#define xchg(ptr, x) \
49-
((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
50-
51-
extern asmlinkage void __backtrace(void);
52-
extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
53-
54-
struct mm_struct;
55-
extern void show_pte(struct mm_struct *mm, unsigned long addr);
56-
extern void __show_regs(struct pt_regs *);
57-
58-
extern int cpu_architecture(void);
59-
extern void cpu_init(void);
60-
61-
#define vectors_high() (cr_alignment & CR_V)
62-
63-
#define isb() __asm__ __volatile__ ("" : : : "memory")
64-
#define dsb() __asm__ __volatile__ ("" : : : "memory")
65-
#define dmb() __asm__ __volatile__ ("" : : : "memory")
66-
67-
#define mb() barrier()
68-
#define rmb() barrier()
69-
#define wmb() barrier()
70-
#define smp_mb() barrier()
71-
#define smp_rmb() barrier()
72-
#define smp_wmb() barrier()
73-
#define read_barrier_depends() do { } while (0)
74-
#define smp_read_barrier_depends() do { } while (0)
75-
76-
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
77-
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
78-
79-
extern unsigned long cr_no_alignment; /* defined in entry-unicore.S */
80-
extern unsigned long cr_alignment; /* defined in entry-unicore.S */
81-
82-
static inline unsigned int get_cr(void)
83-
{
84-
unsigned int val;
85-
asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
86-
return val;
87-
}
88-
89-
static inline void set_cr(unsigned int val)
90-
{
91-
asm volatile("movc p0.c1, %0, #0 @set CR"
92-
: : "r" (val) : "cc");
93-
isb();
94-
}
95-
96-
extern void adjust_cr(unsigned long mask, unsigned long set);
97-
98-
/*
99-
* switch_to(prev, next) should switch from task `prev' to `next'
100-
* `prev' will never be the same as `next'. schedule() itself
101-
* contains the memory barrier to tell GCC not to cache `current'.
102-
*/
103-
extern struct task_struct *__switch_to(struct task_struct *,
104-
struct thread_info *, struct thread_info *);
105-
extern void panic(const char *fmt, ...);
106-
107-
#define switch_to(prev, next, last) \
108-
do { \
109-
last = __switch_to(prev, \
110-
task_thread_info(prev), task_thread_info(next)); \
111-
} while (0)
112-
113-
static inline unsigned long
114-
__xchg(unsigned long x, volatile void *ptr, int size)
115-
{
116-
unsigned long ret;
117-
118-
switch (size) {
119-
case 1:
120-
asm volatile("@ __xchg1\n"
121-
" swapb %0, %1, [%2]"
122-
: "=&r" (ret)
123-
: "r" (x), "r" (ptr)
124-
: "memory", "cc");
125-
break;
126-
case 4:
127-
asm volatile("@ __xchg4\n"
128-
" swapw %0, %1, [%2]"
129-
: "=&r" (ret)
130-
: "r" (x), "r" (ptr)
131-
: "memory", "cc");
132-
break;
133-
default:
134-
panic("xchg: bad data size: ptr 0x%p, size %d\n",
135-
ptr, size);
136-
}
137-
138-
return ret;
139-
}
140-
141-
#include <asm-generic/cmpxchg-local.h>
142-
143-
/*
144-
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
145-
* them available.
146-
*/
147-
#define cmpxchg_local(ptr, o, n) \
148-
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
149-
(unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
150-
#define cmpxchg64_local(ptr, o, n) \
151-
__cmpxchg64_local_generic((ptr), (o), (n))
152-
153-
#include <asm-generic/cmpxchg.h>
154-
155-
#endif /* __ASSEMBLY__ */
156-
157-
#define arch_align_stack(x) (x)
158-
159-
#endif /* __KERNEL__ */
160-
161-
#endif
1+
/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
2+
#include <asm/barrier.h>
3+
#include <asm/cmpxchg.h>
4+
#include <asm/exec.h>
5+
#include <asm/switch_to.h>

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