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[interpreter] Add i64x2.eq and i64x2.ne
These instructions were added in WebAssembly#381 and WebAssembly#411 respectively. The binary opcodes for these are still not finalized, I'm using what V8 is using for now.
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9 files changed

+189
-4
lines changed

‎interpreter/binary/decode.ml

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@@ -385,11 +385,13 @@ let simd_prefix s =
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| 0xb8l -> i32x4_max_s
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| 0xb9l -> i32x4_max_u
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| 0xbal -> i32x4_dot_i16x8_s
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| 0xc0l -> i64x2_eq
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| 0xc1l -> i64x2_neg
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| 0xcbl -> i64x2_shl
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| 0xccl -> i64x2_shr_s
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| 0xcdl -> i64x2_shr_u
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| 0xcel -> i64x2_add
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| 0xd0l -> i64x2_ne
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| 0xd1l -> i64x2_sub
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| 0xd5l -> i64x2_mul
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| 0xd8l -> f32x4_ceil

‎interpreter/binary/encode.ml

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@@ -488,6 +488,8 @@ let encode m =
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| Binary (V128 V128Op.(I64x2 Add)) -> simd_op 0xcel
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| Binary (V128 V128Op.(I64x2 Sub)) -> simd_op 0xd1l
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| Binary (V128 V128Op.(I64x2 Mul)) -> simd_op 0xd5l
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| Binary (V128 V128Op.(I64x2 Eq)) -> simd_op 0xc0l
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| Binary (V128 V128Op.(I64x2 Ne)) -> simd_op 0xd0l
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| Binary (V128 V128Op.(F32x4 Eq)) -> simd_op 0x41l
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| Binary (V128 V128Op.(F32x4 Ne)) -> simd_op 0x42l
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| Binary (V128 V128Op.(F32x4 Lt)) -> simd_op 0x43l

‎interpreter/exec/eval_simd.ml

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@@ -119,6 +119,8 @@ module SimdOp (SXX : Simd.S) (Value : ValueType with type t = SXX.t) = struct
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| I32x4 GeS -> SXX.I32x4.ge_s
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| I32x4 GeU -> SXX.I32x4.ge_u
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| I32x4 DotI16x8S -> SXX.I32x4_convert.dot_i16x8_s
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| I64x2 Eq -> SXX.I64x2.eq
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| I64x2 Ne -> SXX.I64x2.ne
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| I64x2 Add -> SXX.I64x2.add
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| I64x2 Sub -> SXX.I64x2.sub
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| I64x2 Mul -> SXX.I64x2.mul

‎interpreter/syntax/operators.ml

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@@ -379,6 +379,8 @@ let i32x4_dot_i16x8_s = Binary (V128 V128Op.(I32x4 DotI16x8S))
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let i64x2_splat = Convert (V128 V128Op.(I64x2 Splat))
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let i64x2_extract_lane imm = SimdExtract (V128Op.I64x2 (ZX, imm))
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let i64x2_replace_lane imm = SimdReplace (V128Op.I64x2 imm)
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let i64x2_eq = Binary (V128 V128Op.(I64x2 Eq))
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let i64x2_ne = Binary (V128 V128Op.(I64x2 Ne))
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let i64x2_neg = Unary (V128 V128Op.(I64x2 Neg))
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let i64x2_add = Binary (V128 V128Op.(I64x2 Add))
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let i64x2_sub = Binary (V128 V128Op.(I64x2 Sub))

‎interpreter/text/arrange.ml

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@@ -269,6 +269,8 @@ struct
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| I32x4 LeU -> "i32x4.le_u"
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| I32x4 GeS -> "i32x4.ge_s"
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| I32x4 GeU -> "i32x4.ge_u"
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| I64x2 Eq -> "i64x2.eq"
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| I64x2 Ne -> "i64x2.ne"
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| I8x16 NarrowS -> "i8x16.narrow_i16x8_s"
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| I8x16 NarrowU -> "i8x16.narrow_i16x8_u"
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| I8x16 Add -> "i8x16.add"

‎interpreter/text/lexer.mll

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@@ -458,11 +458,9 @@ rule token = parse
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| "output" { OUTPUT }
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| (simd_shape as s)".eq"
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{ except ["i64x2"] s lexbuf;
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BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq unreachable f32x4_eq f64x2_eq) }
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{ BINARY (simdop s i8x16_eq i16x8_eq i32x4_eq i64x2_eq f32x4_eq f64x2_eq) }
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| (simd_shape as s)".ne"
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{ except ["i64x2"] s lexbuf;
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BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne unreachable f32x4_ne f64x2_ne) }
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{ BINARY (simdop s i8x16_ne i16x8_ne i32x4_ne i64x2_ne f32x4_ne f64x2_ne) }
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| (simd_int_shape as s)".lt_s"
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{ except ["i64x2"] s lexbuf;
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BINARY (simd_int_op s i8x16_lt_s i16x8_lt_s i32x4_lt_s unreachable) }

‎test/core/simd/meta/gen_tests.py

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@@ -13,6 +13,7 @@
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'simd_i8x16_cmp',
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'simd_i16x8_cmp',
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'simd_i32x4_cmp',
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'simd_i64x2_cmp',
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'simd_f32x4_cmp',
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'simd_f64x2_cmp',
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'simd_i8x16_arith',

‎test/core/simd/meta/simd_i64x2_cmp.py

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#!/usr/bin/env python3
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from simd_compare import SimdCmpCase
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# Generate i64x2 test case
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class Simdi64x2CmpCase(SimdCmpCase):
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LANE_TYPE = 'i64x2'
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BINARY_OPS = ['eq', 'ne']
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# Override this since i64x2 does not support as many comparison instructions.
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CASE_TXT = """
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;; Test all the {lane_type} comparison operators on major boundary values and all special values.
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(module
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(func (export "eq") (param $x v128) (param $y v128) (result v128) ({lane_type}.eq (local.get $x) (local.get $y)))
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(func (export "ne") (param $x v128) (param $y v128) (result v128) ({lane_type}.ne (local.get $x) (local.get $y)))
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)
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{normal_case}
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;; Type check
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(assert_invalid (module (func (result v128) ({lane_type}.eq (i32.const 0) (f32.const 0)))) "type mismatch")
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(assert_invalid (module (func (result v128) ({lane_type}.ne (i32.const 0) (f32.const 0)))) "type mismatch")
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"""
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def get_case_data(self):
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forms = ['i64x2'] * 3
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case_data = []
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case_data.append(['#', 'eq'])
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case_data.append(['#', 'i64x2.eq (i64x2) (i64x2)'])
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case_data.append(['eq', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '-1', forms])
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case_data.append(['eq', ['0x0000000000000000', '0x0000000000000000'], '-1', forms])
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case_data.append(['eq', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '-1', forms])
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case_data.append(['eq', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '-1', forms])
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case_data.append(['eq', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '-1', forms])
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case_data.append(['eq', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '-1', forms])
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case_data.append(['eq', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'],
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['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '-1', forms])
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case_data.append(['eq', ['0xFFFFFFFFFFFFFFFF', '0x0FFFFFFFFFFFFFFF'], '0', forms])
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case_data.append(['eq', ['0x1', '0x2'], '0', forms])
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case_data.append(['#', 'ne'])
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case_data.append(['#', 'i64x2.ne (i64x2) (i64x2)'])
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# hex vs hex
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case_data.append(['#', 'hex vs hex'])
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case_data.append(['ne', ['0xFFFFFFFFFFFFFFFF', '0xFFFFFFFFFFFFFFFF'], '0', forms])
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case_data.append(['ne', ['0x0000000000000000', '0x0000000000000000'], '0', forms])
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case_data.append(['ne', ['0xF0F0F0F0F0F0F0F0', '0xF0F0F0F0F0F0F0F0'], '0', forms])
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case_data.append(['ne', ['0x0F0F0F0F0F0F0F0F', '0x0F0F0F0F0F0F0F0F'], '0', forms])
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case_data.append(['ne', [['0xFFFFFFFFFFFFFFFF', '0x0000000000000000'], ['0xFFFFFFFFFFFFFFFF', '0x0000000000000000']], '0', forms])
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case_data.append(['ne', [['0x0000000000000000', '0xFFFFFFFFFFFFFFFF'], ['0x0000000000000000', '0xFFFFFFFFFFFFFFFF']], '0', forms])
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case_data.append(['ne', [['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B'],
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['0x03020100', '0x11100904', '0x1A0B0A12', '0xFFABAA1B']], '0', forms])
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return case_data
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def gen_test_cases():
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i64x2 = Simdi64x2CmpCase()
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i64x2.gen_test_cases()
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if __name__ == '__main__':
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i64x2 = Simdi64x2CmpCase()
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i64x2.gen_test_cases()

‎test/core/simd/simd_i64x2_cmp.wast

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;; Test all the i64x2 comparison operators on major boundary values and all special values.
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(module
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(func (export "eq") (param $x v128) (param $y v128) (result v128) (i64x2.eq (local.get $x) (local.get $y)))
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(func (export "ne") (param $x v128) (param $y v128) (result v128) (i64x2.ne (local.get $x) (local.get $y)))
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)
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;; eq
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;; i64x2.eq (i64x2) (i64x2)
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(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)
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(v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0x0000000000000000 0x0000000000000000)
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(v128.const i64x2 0x0000000000000000 0x0000000000000000))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0)
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(v128.const i64x2 0xF0F0F0F0F0F0F0F0 0xF0F0F0F0F0F0F0F0))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F)
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(v128.const i64x2 0x0F0F0F0F0F0F0F0F 0x0F0F0F0F0F0F0F0F))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000)
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(v128.const i64x2 0xFFFFFFFFFFFFFFFF 0x0000000000000000))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF)
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(v128.const i64x2 0x0000000000000000 0xFFFFFFFFFFFFFFFF))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0x03020100 0x11100904)
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(v128.const i64x2 0x03020100 0x11100904))
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(v128.const i64x2 -1 -1))
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(assert_return (invoke "eq" (v128.const i64x2 0xFFFFFFFFFFFFFFFF 0xFFFFFFFFFFFFFFFF)
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(v128.const i64x2 0x0FFFFFFFFFFFFFFF 0x0FFFFFFFFFFFFFFF))
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(v128.const i64x2 0 0))
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(assert_return (invoke "eq" (v128.const i64x2 0x1 0x1)
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(v128.const i64x2 0x2 0x2))
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(v128.const i64x2 0 0))
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;; ne
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;; i64x2.ne (i64x2) (i64x2)
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;; hex vs hex
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(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF)
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(v128.const i64x2 0xFFFFFFFF 0xFFFFFFFF))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0x00000000)
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(v128.const i64x2 0x00000000 0x00000000))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0)
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(v128.const i64x2 0xF0F0F0F0 0xF0F0F0F0))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F)
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(v128.const i64x2 0x0F0F0F0F 0x0F0F0F0F))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0xFFFFFFFF 0x00000000)
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(v128.const i64x2 0xFFFFFFFF 0x00000000))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0x00000000 0xFFFFFFFF)
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(v128.const i64x2 0x00000000 0xFFFFFFFF))
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(v128.const i64x2 0 0))
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(assert_return (invoke "ne" (v128.const i64x2 0x03020100 0x11100904)
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(v128.const i64x2 0x03020100 0x11100904))
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(v128.const i64x2 0 0))
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;; Type check
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(assert_invalid (module (func (result v128) (i64x2.eq (i32.const 0) (f32.const 0)))) "type mismatch")
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(assert_invalid (module (func (result v128) (i64x2.ne (i32.const 0) (f32.const 0)))) "type mismatch")
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;; Test operation with empty argument
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(assert_invalid
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(module
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(func $i64x2.eq-1st-arg-empty (result v128)
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(i64x2.eq (v128.const i64x2 0 0))
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)
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)
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"type mismatch"
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)
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(assert_invalid
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(module
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(func $i64x2.eq-arg-empty (result v128)
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(i64x2.eq)
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)
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)
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"type mismatch"
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)
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(assert_invalid
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(module
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(func $i64x2.ne-1st-arg-empty (result v128)
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(i64x2.ne (v128.const i64x2 0 0))
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)
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)
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"type mismatch"
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)
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(assert_invalid
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(module
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(func $i64x2.ne-arg-empty (result v128)
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(i64x2.ne)
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)
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)
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"type mismatch"
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)

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