@@ -908,8 +908,7 @@ class RISCVInsertVSETVLI : public MachineFunctionPass {
908
908
void coalesceVSETVLIs (MachineBasicBlock &MBB) const ;
909
909
910
910
VSETVLIInfo getInfoForVSETVLI (const MachineInstr &MI) const ;
911
- VSETVLIInfo computeInfoForInstr (const MachineInstr &MI,
912
- uint64_t TSFlags) const ;
911
+ VSETVLIInfo computeInfoForInstr (const MachineInstr &MI) const ;
913
912
};
914
913
915
914
} // end anonymous namespace
@@ -957,9 +956,10 @@ static unsigned computeVLMAX(unsigned VLEN, unsigned SEW,
957
956
return VLEN/SEW;
958
957
}
959
958
960
- VSETVLIInfo RISCVInsertVSETVLI::computeInfoForInstr ( const MachineInstr &MI,
961
- uint64_t TSFlags ) const {
959
+ VSETVLIInfo
960
+ RISCVInsertVSETVLI::computeInfoForInstr ( const MachineInstr &MI ) const {
962
961
VSETVLIInfo InstrInfo;
962
+ const uint64_t TSFlags = MI.getDesc ().TSFlags ;
963
963
964
964
bool TailAgnostic = true ;
965
965
bool MaskAgnostic = true ;
@@ -1198,13 +1198,12 @@ static VSETVLIInfo adjustIncoming(VSETVLIInfo PrevInfo, VSETVLIInfo NewInfo,
1198
1198
// legal for MI, but may not be the state requested by MI.
1199
1199
void RISCVInsertVSETVLI::transferBefore (VSETVLIInfo &Info,
1200
1200
const MachineInstr &MI) const {
1201
- uint64_t TSFlags = MI.getDesc ().TSFlags ;
1202
- if (!RISCVII::hasSEWOp (TSFlags))
1201
+ if (!RISCVII::hasSEWOp (MI.getDesc ().TSFlags ))
1203
1202
return ;
1204
1203
1205
1204
DemandedFields Demanded = getDemanded (MI, ST);
1206
1205
1207
- const VSETVLIInfo NewInfo = computeInfoForInstr (MI, TSFlags );
1206
+ const VSETVLIInfo NewInfo = computeInfoForInstr (MI);
1208
1207
assert (NewInfo.isValid () && !NewInfo.isUnknown ());
1209
1208
if (Info.isValid () && !needVSETVLI (Demanded, NewInfo, Info))
1210
1209
return ;
0 commit comments