diff --git a/llvm/lib/Target/Sparc/SparcInstrAliases.td b/llvm/lib/Target/Sparc/SparcInstrAliases.td
index eedad25737f65..e77b7f5c376bf 100644
--- a/llvm/lib/Target/Sparc/SparcInstrAliases.td
+++ b/llvm/lib/Target/Sparc/SparcInstrAliases.td
@@ -568,7 +568,7 @@ let EmitPriority = 0 in {
   // or imm, reg, rd -> or reg, imm, rd
   def : InstAlias<"or $simm13, $rs1, $rd", (ORri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
 
-  // addc/addx imm, reg, rd -> or reg, imm, rd
+  // addc/addx imm, reg, rd -> addc/addx reg, imm, rd
   def : InstAlias<"addx $simm13, $rs1, $rd", (ADDCri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
 }
 
diff --git a/llvm/test/CodeGen/SPARC/inlineasm.ll b/llvm/test/CodeGen/SPARC/inlineasm.ll
index 9817d7c6971f5..14ea0a2a12602 100644
--- a/llvm/test/CodeGen/SPARC/inlineasm.ll
+++ b/llvm/test/CodeGen/SPARC/inlineasm.ll
@@ -144,7 +144,7 @@ entry:
   ret void
 }
 
-; CHECK-label:test_twinword
+; CHECK-LABEL: test_twinword:
 ; CHECK: rd  %asr5, %i1
 ; CHECK: srlx %i1, 32, %i0
 
diff --git a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
index d561216fec6f2..9e4ff04841d5a 100644
--- a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
+++ b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
@@ -193,16 +193,16 @@
 0xef 0x6e 0x40 0x1a
 
 # CHECK: done
-0x81,0xf0,0x00,0x00
+0x81 0xf0 0x00 0x00
 
 # CHECK: retry
-0x83,0xf0,0x00,0x00
+0x83 0xf0 0x00 0x00
 
 # CHECK: saved
-0x81,0x88,0x00,0x00
+0x81 0x88 0x00 0x00
 
 # CHECK: restored
-0x83,0x88,0x00,0x00
+0x83 0x88 0x00 0x00
 
 # CHECK: rdpr %fq, %i5
-0xbb,0x53,0xc0,0x00
+0xbb 0x53 0xc0 0x00