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[AArch64] Add assembly/disassembly for zeroing FRINT and FRECPX/FSQRT
Add assembly/disassembly for the following predicated SVE2.2 instructions - FRINT32X, FRINT32Z (zeroing) - FRINT64X, FRINT64Z (zeroing) - FRINT{N,P,M,Z,A,X,I} (zeroing) - FRECPX, FSQRT (zeroing)
1 parent 9a8292f commit fb1a8bc

37 files changed

+1107
-9
lines changed

‎llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4233,6 +4233,25 @@ let Predicates = [HasSVE2p2orSME2p2] in {
42334233
defm FRINT32X_ZPmZ : sve_fp_2op_p_zd_frint<0b01, "frint32x">;
42344234
defm FRINT64X_ZPmZ : sve_fp_2op_p_zd_frint<0b10, "frint64z">;
42354235
defm FRINT64Z_ZPmZ : sve_fp_2op_p_zd_frint<0b11, "frint64x">;
4236+
// Zeroing
4237+
defm FRINT32Z_ZPzZ : sve_fp_z2op_p_zd_frint<0b00, "frint32z">;
4238+
defm FRINT32X_ZPzZ : sve_fp_z2op_p_zd_frint<0b01, "frint32x">;
4239+
defm FRINT64Z_ZPzZ : sve_fp_z2op_p_zd_frint<0b10, "frint64z">;
4240+
defm FRINT64X_ZPzZ : sve_fp_z2op_p_zd_frint<0b11, "frint64x">;
4241+
4242+
// Floating-point round to integral fp value, zeroing predicate
4243+
defm FRINTN_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00000, "frintn">;
4244+
defm FRINTP_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00001, "frintp">;
4245+
defm FRINTM_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00010, "frintm">;
4246+
defm FRINTZ_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00011, "frintz">;
4247+
defm FRINTA_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00100, "frinta">;
4248+
defm FRINTX_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00110, "frintx">;
4249+
defm FRINTI_ZPzZ : sve_fp_z2op_p_zd_hsd<0b00111, "frinti">;
4250+
// Floating-point invert exponent, zeroing predicate
4251+
defm FRECPX_ZPzZ : sve_fp_z2op_p_zd_hsd<0b01100, "frecpx">;
4252+
// Floating-point square root, zeroing predicate
4253+
defm FSQRT_ZPZz : sve_fp_z2op_p_zd_hsd<0b01101, "fsqrt">;
4254+
42364255
} // End HasSME2p2orSVE2p2
42374256

42384257
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/AArch64/SVEInstrFormats.td

Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3143,6 +3143,44 @@ multiclass sve_fp_2op_u_zd<bits<3> opc, string asm, SDPatternOperator op> {
31433143
def : SVE_1_Op_Pat<nxv2f64, op, nxv2f64, !cast<Instruction>(NAME # _D)>;
31443144
}
31453145

3146+
//===----------------------------------------------------------------------===//
3147+
// SVE Floating Point Unary Operations - Zeroing Predicate Group
3148+
//===----------------------------------------------------------------------===//
3149+
3150+
class sve_fp_z2op_p_zd<bits<7> opc,string asm, RegisterOperand i_zprtype,
3151+
RegisterOperand o_zprtype>
3152+
: I<(outs o_zprtype:$Zd), (ins PPR3bAny:$Pg, i_zprtype:$Zn),
3153+
asm, "\t$Zd, $Pg/z, $Zn",
3154+
"",
3155+
[]>, Sched<[]> {
3156+
bits<3> Pg;
3157+
bits<5> Zd;
3158+
bits<5> Zn;
3159+
let Inst{31-24} = 0b01100100;
3160+
let Inst{23-22} = opc{6-5};
3161+
let Inst{21-19} = 0b011;
3162+
let Inst{18-16} = opc{4-2};
3163+
let Inst{15} = 0b1;
3164+
let Inst{14-13} = opc{1-0};
3165+
let Inst{12-10} = Pg;
3166+
let Inst{9-5} = Zn;
3167+
let Inst{4-0} = Zd;
3168+
3169+
let hasSideEffects = 0;
3170+
let mayRaiseFPException = 1;
3171+
}
3172+
3173+
multiclass sve_fp_z2op_p_zd_hsd<bits<5> opc, string asm> {
3174+
def _H : sve_fp_z2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16>;
3175+
def _S : sve_fp_z2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32>;
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def _D : sve_fp_z2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64>;
3177+
}
3178+
3179+
multiclass sve_fp_z2op_p_zd_frint<bits<2> opc, string asm> {
3180+
def _S : sve_fp_z2op_p_zd<{ 0b0010, opc{1}, 0, opc{0} }, asm, ZPR32, ZPR32>;
3181+
def _D : sve_fp_z2op_p_zd<{ 0b0010, opc{1}, 1, opc{0} }, asm, ZPR64, ZPR64>;
3182+
}
3183+
31463184
//===----------------------------------------------------------------------===//
31473185
// SVE Integer Arithmetic - Binary Predicated Group
31483186
//===----------------------------------------------------------------------===//

‎llvm/test/MC/AArch64/SVE/frecpx-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frecpx z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frecpx z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frecpx z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frinta-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frinta z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frinta z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frinta z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frinti-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frinti z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frinti z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frinti z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frintm-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frintm z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frintm z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frintm z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frintn-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frintn z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frintn z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frintn z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frintp-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frintp z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frintp z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frintp z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frintx-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frintx z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frintx z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frintx z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/frintz-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ frintz z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
frintz z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: frintz z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE/fsqrt-diagnostics.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ fsqrt z0.b, p0/m, z0.b
66
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
77

88
fsqrt z0.s, p0/z, z0.s
9-
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
9+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction requires: sme2p2 or sve2p2
1010
// CHECK-NEXT: fsqrt z0.s, p0/z, z0.s
1111
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
1212

‎llvm/test/MC/AArch64/SVE2p2/frecpx_z-diagnostics.s

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 2>&1 < %s| FileCheck %s
2+
3+
// ------------------------------------------------------------------------- //
4+
// Invalid element width
5+
6+
frecpx z31.b, p7/z, z31.b
7+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
8+
// CHECK-NEXT: frecpx z31.b, p7/z, z31.b
9+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10+
11+
frecpx z31.h, p7/z, z31.d
12+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
13+
// CHECK-NEXT: frecpx z31.h, p7/z, z31.d
14+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15+
16+
frecpx z31.s, p7/z, z31.h
17+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
18+
// CHECK-NEXT: frecpx z31.s, p7/z, z31.h
19+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
20+
21+
frecpx z31.d, p7/z, z31.s
22+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
23+
// CHECK-NEXT: frecpx z31.d, p7/z, z31.s
24+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25+
26+
// ------------------------------------------------------------------------- //
27+
// Invalid predicate
28+
29+
frecpx z31.h, p8/z, z31.h
30+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
31+
// CHECK-NEXT: frecpx z31.h, p8/z, z31.h
32+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
33+
34+
// --------------------------------------------------------------------------//
35+
// Negative tests for instructions that are incompatible with movprfx
36+
37+
movprfx z0.h, p0/z, z7.h
38+
frecpx z0.h, p0/z, z3.h
39+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
40+
// CHECK-NEXT: frecpx z0.h, p0/z, z3.h
41+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
42+
43+
movprfx z0, z7
44+
frecpx z0.h, p0/z, z3.h
45+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
46+
// CHECK-NEXT: frecpx z0.h, p0/z, z3.h
47+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

‎llvm/test/MC/AArch64/SVE2p2/frecpx_z.s

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 < %s \
2+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2 < %s \
4+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5+
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6+
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p2 < %s \
8+
// RUN: | llvm-objdump -d --mattr=+sve2p2 - | FileCheck %s --check-prefix=CHECK-INST
9+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p2 < %s \
10+
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11+
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
12+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 < %s \
13+
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
14+
// RUN: | llvm-mc -triple=aarch64 -mattr=+sve2p2 -disassemble -show-encoding \
15+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
16+
17+
frecpx z0.h, p0/z, z0.h // 01100100-01011011-10000000-00000000
18+
// CHECK-INST: frecpx z0.h, p0/z, z0.h
19+
// CHECK-ENCODING: [0x00,0x80,0x5b,0x64]
20+
// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
21+
// CHECK-UNKNOWN: 645b8000 <unknown>
22+
23+
frecpx z23.s, p3/z, z13.s // 01100100-10011011-10001101-10110111
24+
// CHECK-INST: frecpx z23.s, p3/z, z13.s
25+
// CHECK-ENCODING: [0xb7,0x8d,0x9b,0x64]
26+
// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
27+
// CHECK-UNKNOWN: 649b8db7 <unknown>
28+
29+
frecpx z31.d, p7/z, z31.d // 01100100-11011011-10011111-11111111
30+
// CHECK-INST: frecpx z31.d, p7/z, z31.d
31+
// CHECK-ENCODING: [0xff,0x9f,0xdb,0x64]
32+
// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
33+
// CHECK-UNKNOWN: 64db9fff <unknown>

‎llvm/test/MC/AArch64/SVE2p2/frint32x_z-diagnostics.s

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 2>&1 < %s| FileCheck %s
2+
3+
// ------------------------------------------------------------------------- //
4+
// Invalid element width
5+
6+
frint32x z31.b, p7/z, z31.b
7+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
8+
// CHECK-NEXT: frint32x z31.b, p7/z, z31.b
9+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10+
11+
frint32x z31.h, p7/z, z31.h
12+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
13+
// CHECK-NEXT: frint32x z31.h, p7/z, z31.h
14+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15+
16+
frint32x z31.s, p7/z, z31.d
17+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
18+
// CHECK-NEXT: frint32x z31.s, p7/z, z31.d
19+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
20+
21+
frint32x z31.d, p7/z, z31.s
22+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
23+
// CHECK-NEXT: frint32x z31.d, p7/z, z31.s
24+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25+
26+
// ------------------------------------------------------------------------- //
27+
// Invalid predicate
28+
29+
frint32x z31.s, p8/z, z31.s
30+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
31+
// CHECK-NEXT: frint32x z31.s, p8/z, z31.s
32+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
33+
34+
// --------------------------------------------------------------------------//
35+
// Negative tests for instructions that are incompatible with movprfx
36+
37+
movprfx z0.s, p0/z, z7.s
38+
frint32x z0.s, p0/z, z3.s
39+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
40+
// CHECK-NEXT: frint32x z0.s, p0/z, z3.s
41+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
42+
43+
movprfx z0, z7
44+
frint32x z0.d, p0/z, z3.d
45+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
46+
// CHECK-NEXT: frint32x z0.d, p0/z, z3.d
47+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

‎llvm/test/MC/AArch64/SVE2p2/frint32x_z.s

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 < %s \
2+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2 < %s \
4+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5+
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6+
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p2 < %s \
8+
// RUN: | llvm-objdump -d --mattr=+sve2p2 - | FileCheck %s --check-prefix=CHECK-INST
9+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p2 < %s \
10+
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11+
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
12+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 < %s \
13+
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
14+
// RUN: | llvm-mc -triple=aarch64 -mattr=+sve2p2 -disassemble -show-encoding \
15+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
16+
17+
frint32x z0.d, p0/z, z0.d // 01100100-00011100-11100000-00000000
18+
// CHECK-INST: frint32x z0.d, p0/z, z0.d
19+
// CHECK-ENCODING: [0x00,0xe0,0x1c,0x64]
20+
// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
21+
// CHECK-UNKNOWN: 641ce000 <unknown>
22+
23+
frint32x z23.d, p3/z, z13.d // 01100100-00011100-11101101-10110111
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// CHECK-INST: frint32x z23.d, p3/z, z13.d
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// CHECK-ENCODING: [0xb7,0xed,0x1c,0x64]
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// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
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// CHECK-UNKNOWN: 641cedb7 <unknown>
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frint32x z31.s, p7/z, z31.s // 01100100-00011100-10111111-11111111
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// CHECK-INST: frint32x z31.s, p7/z, z31.s
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// CHECK-ENCODING: [0xff,0xbf,0x1c,0x64]
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// CHECK-ERROR: instruction requires: sme2p2 or sve2p2
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// CHECK-UNKNOWN: 641cbfff <unknown>

‎llvm/test/MC/AArch64/SVE2p2/frint32z_z-diagnostics.s

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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p2 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid element width
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frint32z z31.b, p7/z, z31.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: frint32z z31.b, p7/z, z31.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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frint32z z31.h, p7/z, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: frint32z z31.h, p7/z, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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frint32z z31.s, p7/z, z31.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: frint32z z31.s, p7/z, z31.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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frint32z z31.d, p7/z, z31.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: frint32z z31.d, p7/z, z31.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid predicate
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frint32z z31.s, p8/z, z31.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: frint32z z31.s, p8/z, z31.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.s, p0/z, z7.s
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frint32z z0.s, p0/z, z3.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: frint32z z0.s, p0/z, z3.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0, z7
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frint32z z0.d, p0/z, z3.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
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// CHECK-NEXT: frint32z z0.d, p0/z, z3.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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