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+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc %s -x86-early-ifcvt -pass-remarks='early-ifcvt' -pass-remarks-missed='early-ifcvt' -mcpu=k8 -o - 2>&1 | FileCheck %s
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target triple = "x86_64-none-none"
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@@ -6,7 +7,26 @@ target triple = "x86_64-none-none"
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; CHECK-SAME: and the short leg adds another {{[0-9]+}} cycles{{s?}},
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; CHECK-SAME: and the long leg adds another {{[0-9]+}} cycles{{s?}},
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; CHECK-SAME: each staying under the threshold of {{[0-9]+}} cycles{{s?}}.
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+
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+ ; CHECK: remark: <unknown>:0:0: did not if-convert branch:
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+ ; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path,
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+ ; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}},
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+ ; CHECK-SAME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} cycles{{s?}}.
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+
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+ ; CHECK: remark: <unknown>:0:0: did not if-convert branch:
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+ ; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}})
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+ ; CHECK-SAME: would extend the shorter leg's critical path ({{[0-9]+}} cycle{{s?}})
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+ ; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}},
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+ ; CHECK-SAME: which cannot be hidden by available ILP.
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+
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define i32 @mm1 (i1 %pred , i32 %val ) {
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+ ; CHECK-LABEL: mm1:
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+ ; CHECK: # %bb.0: # %entry
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+ ; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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+ ; CHECK-NEXT: leal 1(%rsi), %eax
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+ ; CHECK-NEXT: testb $1, %dil
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+ ; CHECK-NEXT: cmovel %esi, %eax
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+ ; CHECK-NEXT: retq
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entry:
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br i1 %pred , label %if.true , label %if.else
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@@ -19,11 +39,20 @@ if.else:
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ret i32 %res
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}
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- ; CHECK: remark: <unknown>:0:0: did not if-convert branch:
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- ; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path,
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- ; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}},
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- ; CHECK-SAME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} cycles{{s?}}.
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define i32 @mm2 (i1 %pred , i32 %val , i32 %e1 , i32 %e2 , i32 %e3 , i32 %e4 , i32 %e5 ) {
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+ ; CHECK-LABEL: mm2:
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+ ; CHECK: # %bb.0: # %entry
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+ ; CHECK-NEXT: movl %esi, %eax
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+ ; CHECK-NEXT: testb $1, %dil
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+ ; CHECK-NEXT: je .LBB1_2
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+ ; CHECK-NEXT: # %bb.1: # %if.true
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+ ; CHECK-NEXT: addl %eax, %edx
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+ ; CHECK-NEXT: addl %ecx, %r8d
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+ ; CHECK-NEXT: addl %edx, %r8d
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+ ; CHECK-NEXT: addl %r8d, %r9d
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+ ; CHECK-NEXT: movl %r9d, %eax
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+ ; CHECK-NEXT: .LBB1_2: # %if.else
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+ ; CHECK-NEXT: retq
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entry:
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br i1 %pred , label %if.true , label %if.else
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@@ -39,12 +68,48 @@ if.else:
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ret i32 %res
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}
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- ; CHECK: did not if-convert branch:
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- ; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}})
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- ; CHECK-SAME: would extend the shorter leg's critical path ({{[0-9]+}} cycle{{s?}})
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- ; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}},
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- ; CHECK-SAME: which cannot be hidden by available ILP.
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define i32 @mm3 (i1 %pred , i32 %val , i32 %e1 , i128 %e2 , i128 %e3 , i128 %e4 , i128 %e5 ) {
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+ ; CHECK-LABEL: mm3:
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+ ; CHECK: # %bb.0: # %entry
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+ ; CHECK-NEXT: movl %esi, %eax
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+ ; CHECK-NEXT: testb $1, %dil
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+ ; CHECK-NEXT: movl %esi, %r10d
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+ ; CHECK-NEXT: jne .LBB2_2
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+ ; CHECK-NEXT: # %bb.1: # %if.false
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+ ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rsi
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+ ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdi
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+ ; CHECK-NEXT: imull %edx, %edx
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+ ; CHECK-NEXT: movslq %edx, %r10
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+ ; CHECK-NEXT: movq %rcx, %rax
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+ ; CHECK-NEXT: movl %edx, %r9d
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+ ; CHECK-NEXT: mulq %r10
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+ ; CHECK-NEXT: imulq %r10, %r8
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+ ; CHECK-NEXT: sarq $63, %r10
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+ ; CHECK-NEXT: imulq %rcx, %r10
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+ ; CHECK-NEXT: addq %rdx, %r8
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+ ; CHECK-NEXT: addq %r10, %r8
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+ ; CHECK-NEXT: addq {{[0-9]+}}(%rsp), %rax
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+ ; CHECK-NEXT: adcq {{[0-9]+}}(%rsp), %r8
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+ ; CHECK-NEXT: xorq {{[0-9]+}}(%rsp), %rdi
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+ ; CHECK-NEXT: xorq %r8, %rdi
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+ ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %r10
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+ ; CHECK-NEXT: xorq %rsi, %r10
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+ ; CHECK-NEXT: xorq %rax, %r10
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+ ; CHECK-NEXT: movq %rdi, %rax
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+ ; CHECK-NEXT: movl %esi, %ecx
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+ ; CHECK-NEXT: sarq %cl, %rax
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+ ; CHECK-NEXT: addq %rdi, %rdi
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+ ; CHECK-NEXT: notb %cl
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+ ; CHECK-NEXT: shlq %cl, %rdi
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+ ; CHECK-NEXT: movl %esi, %ecx
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+ ; CHECK-NEXT: shrq %cl, %r10
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+ ; CHECK-NEXT: orq %rdi, %r10
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+ ; CHECK-NEXT: testb $64, %sil
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+ ; CHECK-NEXT: cmovneq %rax, %r10
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+ ; CHECK-NEXT: movl %r9d, %eax
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+ ; CHECK-NEXT: .LBB2_2: # %if.endif
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+ ; CHECK-NEXT: addl %r10d, %eax
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+ ; CHECK-NEXT: retq
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entry:
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br i1 %pred , label %if.true , label %if.false
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