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vitalybukavitalybuka
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[NFC][msan] Regenerate tests with --scrub-attributes (#95022)
Attributes are mostly irrelevant to these tests, but very unstable, and change from patch to patch.
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-49
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‎llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll

Lines changed: 33 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --scrub-attributes
22
; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s
33

44
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
@@ -287,7 +287,7 @@ define <4 x float> @test_x86_avx_cvt_pd2_ps_256(<4 x double> %a0) #0 {
287287
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
288288
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0:![0-9]+]]
289289
; CHECK: 3:
290-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8:[0-9]+]]
290+
; CHECK-NEXT: call void @__msan_warning_noreturn()
291291
; CHECK-NEXT: unreachable
292292
; CHECK: 4:
293293
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double> [[A0:%.*]])
@@ -308,7 +308,7 @@ define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) #0 {
308308
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
309309
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
310310
; CHECK: 3:
311-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
311+
; CHECK-NEXT: call void @__msan_warning_noreturn()
312312
; CHECK-NEXT: unreachable
313313
; CHECK: 4:
314314
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> [[A0:%.*]])
@@ -329,7 +329,7 @@ define <8 x i32> @test_x86_avx_cvt_ps2dq_256(<8 x float> %a0) #0 {
329329
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
330330
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
331331
; CHECK: 3:
332-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
332+
; CHECK-NEXT: call void @__msan_warning_noreturn()
333333
; CHECK-NEXT: unreachable
334334
; CHECK: 4:
335335
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> [[A0:%.*]])
@@ -350,7 +350,7 @@ define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) #0 {
350350
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
351351
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
352352
; CHECK: 3:
353-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
353+
; CHECK-NEXT: call void @__msan_warning_noreturn()
354354
; CHECK-NEXT: unreachable
355355
; CHECK: 4:
356356
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> [[A0:%.*]])
@@ -371,7 +371,7 @@ define <8 x i32> @test_x86_avx_cvtt_ps2dq_256(<8 x float> %a0) #0 {
371371
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
372372
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
373373
; CHECK: 3:
374-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
374+
; CHECK-NEXT: call void @__msan_warning_noreturn()
375375
; CHECK-NEXT: unreachable
376376
; CHECK: 4:
377377
; CHECK-NEXT: [[RES:%.*]] = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> [[A0:%.*]])
@@ -396,7 +396,7 @@ define <8 x float> @test_x86_avx_dp_ps_256(<8 x float> %a0, <8 x float> %a1) #0
396396
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
397397
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
398398
; CHECK: 5:
399-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
399+
; CHECK-NEXT: call void @__msan_warning_noreturn()
400400
; CHECK-NEXT: unreachable
401401
; CHECK: 6:
402402
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float> [[A0:%.*]], <8 x float> [[A1:%.*]], i8 7)
@@ -484,7 +484,7 @@ define <32 x i8> @test_x86_avx_ldu_dq_256(ptr %a0) #0 {
484484
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
485485
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
486486
; CHECK: 5:
487-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
487+
; CHECK-NEXT: call void @__msan_warning_noreturn()
488488
; CHECK-NEXT: unreachable
489489
; CHECK: 6:
490490
; CHECK-NEXT: [[RES:%.*]] = call <32 x i8> @llvm.x86.avx.ldu.dq.256(ptr [[A0]])
@@ -508,7 +508,7 @@ define <2 x double> @test_x86_avx_maskload_pd(ptr %a0, <2 x i64> %mask) #0 {
508508
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
509509
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0]]
510510
; CHECK: 4:
511-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
511+
; CHECK-NEXT: call void @__msan_warning_noreturn()
512512
; CHECK-NEXT: unreachable
513513
; CHECK: 5:
514514
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.x86.avx.maskload.pd(ptr [[A0:%.*]], <2 x i64> [[MASK:%.*]])
@@ -532,7 +532,7 @@ define <4 x double> @test_x86_avx_maskload_pd_256(ptr %a0, <4 x i64> %mask) #0 {
532532
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
533533
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0]]
534534
; CHECK: 4:
535-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
535+
; CHECK-NEXT: call void @__msan_warning_noreturn()
536536
; CHECK-NEXT: unreachable
537537
; CHECK: 5:
538538
; CHECK-NEXT: [[RES:%.*]] = call <4 x double> @llvm.x86.avx.maskload.pd.256(ptr [[A0:%.*]], <4 x i64> [[MASK:%.*]])
@@ -556,7 +556,7 @@ define <4 x float> @test_x86_avx_maskload_ps(ptr %a0, <4 x i32> %mask) #0 {
556556
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
557557
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0]]
558558
; CHECK: 4:
559-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
559+
; CHECK-NEXT: call void @__msan_warning_noreturn()
560560
; CHECK-NEXT: unreachable
561561
; CHECK: 5:
562562
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx.maskload.ps(ptr [[A0:%.*]], <4 x i32> [[MASK:%.*]])
@@ -580,7 +580,7 @@ define <8 x float> @test_x86_avx_maskload_ps_256(ptr %a0, <8 x i32> %mask) #0 {
580580
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
581581
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0]]
582582
; CHECK: 4:
583-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
583+
; CHECK-NEXT: call void @__msan_warning_noreturn()
584584
; CHECK-NEXT: unreachable
585585
; CHECK: 5:
586586
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx.maskload.ps.256(ptr [[A0:%.*]], <8 x i32> [[MASK:%.*]])
@@ -608,7 +608,7 @@ define void @test_x86_avx_maskstore_pd(ptr %a0, <2 x i64> %mask, <2 x double> %a
608608
; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]
609609
; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF0]]
610610
; CHECK: 6:
611-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
611+
; CHECK-NEXT: call void @__msan_warning_noreturn()
612612
; CHECK-NEXT: unreachable
613613
; CHECK: 7:
614614
; CHECK-NEXT: call void @llvm.x86.avx.maskstore.pd(ptr [[A0:%.*]], <2 x i64> [[MASK:%.*]], <2 x double> [[A2:%.*]])
@@ -635,7 +635,7 @@ define void @test_x86_avx_maskstore_pd_256(ptr %a0, <4 x i64> %mask, <4 x double
635635
; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]
636636
; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF0]]
637637
; CHECK: 6:
638-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
638+
; CHECK-NEXT: call void @__msan_warning_noreturn()
639639
; CHECK-NEXT: unreachable
640640
; CHECK: 7:
641641
; CHECK-NEXT: call void @llvm.x86.avx.maskstore.pd.256(ptr [[A0:%.*]], <4 x i64> [[MASK:%.*]], <4 x double> [[A2:%.*]])
@@ -662,7 +662,7 @@ define void @test_x86_avx_maskstore_ps(ptr %a0, <4 x i32> %mask, <4 x float> %a2
662662
; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]
663663
; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF0]]
664664
; CHECK: 6:
665-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
665+
; CHECK-NEXT: call void @__msan_warning_noreturn()
666666
; CHECK-NEXT: unreachable
667667
; CHECK: 7:
668668
; CHECK-NEXT: call void @llvm.x86.avx.maskstore.ps(ptr [[A0:%.*]], <4 x i32> [[MASK:%.*]], <4 x float> [[A2:%.*]])
@@ -689,7 +689,7 @@ define void @test_x86_avx_maskstore_ps_256(ptr %a0, <8 x i32> %mask, <8 x float>
689689
; CHECK-NEXT: [[_MSOR3:%.*]] = or i1 [[_MSOR]], [[_MSCMP2]]
690690
; CHECK-NEXT: br i1 [[_MSOR3]], label [[TMP6:%.*]], label [[TMP7:%.*]], !prof [[PROF0]]
691691
; CHECK: 6:
692-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
692+
; CHECK-NEXT: call void @__msan_warning_noreturn()
693693
; CHECK-NEXT: unreachable
694694
; CHECK: 7:
695695
; CHECK-NEXT: call void @llvm.x86.avx.maskstore.ps.256(ptr [[A0:%.*]], <8 x i32> [[MASK:%.*]], <8 x float> [[A2:%.*]])
@@ -773,7 +773,7 @@ define i32 @test_x86_avx_movmsk_pd_256(<4 x double> %a0) #0 {
773773
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
774774
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
775775
; CHECK: 3:
776-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
776+
; CHECK-NEXT: call void @__msan_warning_noreturn()
777777
; CHECK-NEXT: unreachable
778778
; CHECK: 4:
779779
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> [[A0:%.*]])
@@ -794,7 +794,7 @@ define i32 @test_x86_avx_movmsk_ps_256(<8 x float> %a0) #0 {
794794
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
795795
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
796796
; CHECK: 3:
797-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
797+
; CHECK-NEXT: call void @__msan_warning_noreturn()
798798
; CHECK-NEXT: unreachable
799799
; CHECK: 4:
800800
; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> [[A0:%.*]])
@@ -886,7 +886,7 @@ define <4 x double> @test_x86_avx_round_pd_256(<4 x double> %a0) #0 {
886886
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
887887
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
888888
; CHECK: 3:
889-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
889+
; CHECK-NEXT: call void @__msan_warning_noreturn()
890890
; CHECK-NEXT: unreachable
891891
; CHECK: 4:
892892
; CHECK-NEXT: [[RES:%.*]] = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> [[A0:%.*]], i32 7)
@@ -907,7 +907,7 @@ define <8 x float> @test_x86_avx_round_ps_256(<8 x float> %a0) #0 {
907907
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
908908
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
909909
; CHECK: 3:
910-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
910+
; CHECK-NEXT: call void @__msan_warning_noreturn()
911911
; CHECK-NEXT: unreachable
912912
; CHECK: 4:
913913
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> [[A0:%.*]], i32 7)
@@ -945,7 +945,7 @@ define <2 x double> @test_x86_avx_vpermilvar_pd(<2 x double> %a0, <2 x i64> %a1)
945945
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
946946
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
947947
; CHECK: 5:
948-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
948+
; CHECK-NEXT: call void @__msan_warning_noreturn()
949949
; CHECK-NEXT: unreachable
950950
; CHECK: 6:
951951
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> [[A0:%.*]], <2 x i64> [[A1:%.*]])
@@ -970,7 +970,7 @@ define <4 x double> @test_x86_avx_vpermilvar_pd_256(<4 x double> %a0, <4 x i64>
970970
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
971971
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
972972
; CHECK: 5:
973-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
973+
; CHECK-NEXT: call void @__msan_warning_noreturn()
974974
; CHECK-NEXT: unreachable
975975
; CHECK: 6:
976976
; CHECK-NEXT: [[RES:%.*]] = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> [[A0:%.*]], <4 x i64> [[A1:%.*]])
@@ -990,7 +990,7 @@ define <4 x double> @test_x86_avx_vpermilvar_pd_256_2(<4 x double> %a0) #0 {
990990
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP2]], 0
991991
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
992992
; CHECK: 3:
993-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
993+
; CHECK-NEXT: call void @__msan_warning_noreturn()
994994
; CHECK-NEXT: unreachable
995995
; CHECK: 4:
996996
; CHECK-NEXT: [[RES:%.*]] = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> [[A0:%.*]], <4 x i64> <i64 2, i64 0, i64 0, i64 2>)
@@ -1013,7 +1013,7 @@ define <4 x float> @test_x86_avx_vpermilvar_ps(<4 x float> %a0, <4 x i32> %a1) #
10131013
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
10141014
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
10151015
; CHECK: 5:
1016-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1016+
; CHECK-NEXT: call void @__msan_warning_noreturn()
10171017
; CHECK-NEXT: unreachable
10181018
; CHECK: 6:
10191019
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> [[A0:%.*]], <4 x i32> [[A1:%.*]])
@@ -1031,7 +1031,7 @@ define <4 x float> @test_x86_avx_vpermilvar_ps_load(<4 x float> %a0, ptr %a1) #0
10311031
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
10321032
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
10331033
; CHECK: 3:
1034-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1034+
; CHECK-NEXT: call void @__msan_warning_noreturn()
10351035
; CHECK-NEXT: unreachable
10361036
; CHECK: 4:
10371037
; CHECK-NEXT: [[A2:%.*]] = load <4 x i32>, ptr [[A1:%.*]], align 16
@@ -1046,7 +1046,7 @@ define <4 x float> @test_x86_avx_vpermilvar_ps_load(<4 x float> %a0, ptr %a1) #0
10461046
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP1]], [[_MSCMP2]]
10471047
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF0]]
10481048
; CHECK: 10:
1049-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1049+
; CHECK-NEXT: call void @__msan_warning_noreturn()
10501050
; CHECK-NEXT: unreachable
10511051
; CHECK: 11:
10521052
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> [[A0:%.*]], <4 x i32> [[A2]])
@@ -1072,7 +1072,7 @@ define <8 x float> @test_x86_avx_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a
10721072
; CHECK-NEXT: [[_MSOR:%.*]] = or i1 [[_MSCMP]], [[_MSCMP1]]
10731073
; CHECK-NEXT: br i1 [[_MSOR]], label [[TMP5:%.*]], label [[TMP6:%.*]], !prof [[PROF0]]
10741074
; CHECK: 5:
1075-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1075+
; CHECK-NEXT: call void @__msan_warning_noreturn()
10761076
; CHECK-NEXT: unreachable
10771077
; CHECK: 6:
10781078
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> [[A0:%.*]], <8 x i32> [[A1:%.*]])
@@ -1348,14 +1348,14 @@ define void @movnt_dq(ptr %p, <2 x i64> %a1) nounwind #0 {
13481348
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0
13491349
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
13501350
; CHECK: 3:
1351-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1351+
; CHECK-NEXT: call void @__msan_warning_noreturn()
13521352
; CHECK-NEXT: unreachable
13531353
; CHECK: 4:
13541354
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
13551355
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
13561356
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
13571357
; CHECK-NEXT: store <4 x i64> [[_MSPROP1]], ptr [[TMP7]], align 32
1358-
; CHECK-NEXT: store <4 x i64> [[A3]], ptr [[P]], align 32, !nontemporal !1
1358+
; CHECK-NEXT: store <4 x i64> [[A3]], ptr [[P]], align 32, !nontemporal [[META1:![0-9]+]]
13591359
; CHECK-NEXT: ret void
13601360
;
13611361
%a2 = add <2 x i64> %a1, <i64 1, i64 1>
@@ -1373,14 +1373,14 @@ define void @movnt_ps(ptr %p, <8 x float> %a) nounwind #0 {
13731373
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
13741374
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
13751375
; CHECK: 3:
1376-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1376+
; CHECK-NEXT: call void @__msan_warning_noreturn()
13771377
; CHECK-NEXT: unreachable
13781378
; CHECK: 4:
13791379
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
13801380
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
13811381
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
13821382
; CHECK-NEXT: store <8 x i32> [[TMP2]], ptr [[TMP7]], align 32
1383-
; CHECK-NEXT: store <8 x float> [[A:%.*]], ptr [[P]], align 32, !nontemporal !1
1383+
; CHECK-NEXT: store <8 x float> [[A:%.*]], ptr [[P]], align 32, !nontemporal [[META1]]
13841384
; CHECK-NEXT: ret void
13851385
;
13861386
tail call void @llvm.x86.avx.movnt.ps.256(ptr %p, <8 x float> %a) nounwind
@@ -1399,14 +1399,14 @@ define void @movnt_pd(ptr %p, <4 x double> %a1) nounwind #0 {
13991399
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0
14001400
; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
14011401
; CHECK: 3:
1402-
; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR8]]
1402+
; CHECK-NEXT: call void @__msan_warning_noreturn()
14031403
; CHECK-NEXT: unreachable
14041404
; CHECK: 4:
14051405
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
14061406
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
14071407
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
14081408
; CHECK-NEXT: store <4 x i64> [[_MSPROP]], ptr [[TMP7]], align 32
1409-
; CHECK-NEXT: store <4 x double> [[A2]], ptr [[P]], align 32, !nontemporal !1
1409+
; CHECK-NEXT: store <4 x double> [[A2]], ptr [[P]], align 32, !nontemporal [[META1]]
14101410
; CHECK-NEXT: ret void
14111411
;
14121412
%a2 = fadd <4 x double> %a1, <double 0x0, double 0x0, double 0x0, double 0x0>

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