|
| 1 | +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4 |
| 2 | +# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=3 -tail-dup-succ-size=3 %s -o - | FileCheck %s -check-prefix=LIMIT |
| 3 | +# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size=4 -tail-dup-succ-size=4 %s -o - | FileCheck %s -check-prefix=NOLIMIT |
| 4 | + |
| 5 | +--- |
| 6 | +name: foo |
| 7 | +tracksRegLiveness: true |
| 8 | +jumpTable: |
| 9 | + kind: block-address |
| 10 | + entries: |
| 11 | + - id: 0 |
| 12 | + blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5' ] |
| 13 | + - id: 1 |
| 14 | + blocks: [ '%bb.9', '%bb.10', '%bb.11', '%bb.12' ] |
| 15 | +body: | |
| 16 | + ; LIMIT-LABEL: name: foo |
| 17 | + ; LIMIT: bb.0: |
| 18 | + ; LIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000) |
| 19 | + ; LIMIT-NEXT: liveins: $rdi, $esi |
| 20 | + ; LIMIT-NEXT: {{ $}} |
| 21 | + ; LIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi |
| 22 | + ; LIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi |
| 23 | + ; LIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags |
| 24 | + ; LIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags |
| 25 | + ; LIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit |
| 26 | + ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg |
| 27 | + ; LIMIT-NEXT: {{ $}} |
| 28 | + ; LIMIT-NEXT: bb.2: |
| 29 | + ; LIMIT-NEXT: successors: %bb.7(0x80000000) |
| 30 | + ; LIMIT-NEXT: {{ $}} |
| 31 | + ; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 32 | + ; LIMIT-NEXT: JMP_1 %bb.7 |
| 33 | + ; LIMIT-NEXT: {{ $}} |
| 34 | + ; LIMIT-NEXT: bb.3: |
| 35 | + ; LIMIT-NEXT: successors: %bb.7(0x80000000) |
| 36 | + ; LIMIT-NEXT: {{ $}} |
| 37 | + ; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 38 | + ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags |
| 39 | + ; LIMIT-NEXT: JMP_1 %bb.7 |
| 40 | + ; LIMIT-NEXT: {{ $}} |
| 41 | + ; LIMIT-NEXT: bb.4: |
| 42 | + ; LIMIT-NEXT: successors: %bb.7(0x80000000) |
| 43 | + ; LIMIT-NEXT: {{ $}} |
| 44 | + ; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 45 | + ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags |
| 46 | + ; LIMIT-NEXT: JMP_1 %bb.7 |
| 47 | + ; LIMIT-NEXT: {{ $}} |
| 48 | + ; LIMIT-NEXT: bb.5: |
| 49 | + ; LIMIT-NEXT: successors: %bb.7(0x80000000) |
| 50 | + ; LIMIT-NEXT: {{ $}} |
| 51 | + ; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 52 | + ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags |
| 53 | + ; LIMIT-NEXT: JMP_1 %bb.7 |
| 54 | + ; LIMIT-NEXT: {{ $}} |
| 55 | + ; LIMIT-NEXT: bb.6: |
| 56 | + ; LIMIT-NEXT: successors: |
| 57 | + ; LIMIT-NEXT: {{ $}} |
| 58 | + ; LIMIT-NEXT: bb.7: |
| 59 | + ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000) |
| 60 | + ; LIMIT-NEXT: {{ $}} |
| 61 | + ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri3]], %bb.5, [[SHR32ri2]], %bb.4, [[SHR32ri1]], %bb.3, [[MOV32rm]], %bb.2 |
| 62 | + ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags |
| 63 | + ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri4]], 7, implicit-def dead $eflags |
| 64 | + ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri1]], %subreg.sub_32bit |
| 65 | + ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg |
| 66 | + ; LIMIT-NEXT: {{ $}} |
| 67 | + ; LIMIT-NEXT: bb.9: |
| 68 | + ; LIMIT-NEXT: successors: %bb.13(0x80000000) |
| 69 | + ; LIMIT-NEXT: {{ $}} |
| 70 | + ; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 71 | + ; LIMIT-NEXT: JMP_1 %bb.13 |
| 72 | + ; LIMIT-NEXT: {{ $}} |
| 73 | + ; LIMIT-NEXT: bb.10: |
| 74 | + ; LIMIT-NEXT: successors: %bb.13(0x80000000) |
| 75 | + ; LIMIT-NEXT: {{ $}} |
| 76 | + ; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 77 | + ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags |
| 78 | + ; LIMIT-NEXT: JMP_1 %bb.13 |
| 79 | + ; LIMIT-NEXT: {{ $}} |
| 80 | + ; LIMIT-NEXT: bb.11: |
| 81 | + ; LIMIT-NEXT: successors: %bb.13(0x80000000) |
| 82 | + ; LIMIT-NEXT: {{ $}} |
| 83 | + ; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 84 | + ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags |
| 85 | + ; LIMIT-NEXT: JMP_1 %bb.13 |
| 86 | + ; LIMIT-NEXT: {{ $}} |
| 87 | + ; LIMIT-NEXT: bb.12: |
| 88 | + ; LIMIT-NEXT: successors: %bb.13(0x80000000) |
| 89 | + ; LIMIT-NEXT: {{ $}} |
| 90 | + ; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 91 | + ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags |
| 92 | + ; LIMIT-NEXT: {{ $}} |
| 93 | + ; LIMIT-NEXT: bb.13: |
| 94 | + ; LIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[SHR32ri7]], %bb.12, [[SHR32ri6]], %bb.11, [[SHR32ri5]], %bb.10, [[MOV32rm4]], %bb.9 |
| 95 | + ; LIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI1]], [[PHI]], implicit-def dead $eflags |
| 96 | + ; LIMIT-NEXT: $eax = COPY [[OR32rr]] |
| 97 | + ; LIMIT-NEXT: RET 0, $eax |
| 98 | + ; |
| 99 | + ; NOLIMIT-LABEL: name: foo |
| 100 | + ; NOLIMIT: bb.0: |
| 101 | + ; NOLIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000) |
| 102 | + ; NOLIMIT-NEXT: liveins: $rdi, $esi |
| 103 | + ; NOLIMIT-NEXT: {{ $}} |
| 104 | + ; NOLIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi |
| 105 | + ; NOLIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi |
| 106 | + ; NOLIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags |
| 107 | + ; NOLIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags |
| 108 | + ; NOLIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit |
| 109 | + ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg |
| 110 | + ; NOLIMIT-NEXT: {{ $}} |
| 111 | + ; NOLIMIT-NEXT: bb.2: |
| 112 | + ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000) |
| 113 | + ; NOLIMIT-NEXT: {{ $}} |
| 114 | + ; NOLIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 115 | + ; NOLIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags |
| 116 | + ; NOLIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags |
| 117 | + ; NOLIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit |
| 118 | + ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg |
| 119 | + ; NOLIMIT-NEXT: {{ $}} |
| 120 | + ; NOLIMIT-NEXT: bb.3: |
| 121 | + ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000) |
| 122 | + ; NOLIMIT-NEXT: {{ $}} |
| 123 | + ; NOLIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 124 | + ; NOLIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags |
| 125 | + ; NOLIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags |
| 126 | + ; NOLIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags |
| 127 | + ; NOLIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit |
| 128 | + ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg |
| 129 | + ; NOLIMIT-NEXT: {{ $}} |
| 130 | + ; NOLIMIT-NEXT: bb.4: |
| 131 | + ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000) |
| 132 | + ; NOLIMIT-NEXT: {{ $}} |
| 133 | + ; NOLIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 134 | + ; NOLIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags |
| 135 | + ; NOLIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags |
| 136 | + ; NOLIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags |
| 137 | + ; NOLIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit |
| 138 | + ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg |
| 139 | + ; NOLIMIT-NEXT: {{ $}} |
| 140 | + ; NOLIMIT-NEXT: bb.5: |
| 141 | + ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000) |
| 142 | + ; NOLIMIT-NEXT: {{ $}} |
| 143 | + ; NOLIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 144 | + ; NOLIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags |
| 145 | + ; NOLIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags |
| 146 | + ; NOLIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags |
| 147 | + ; NOLIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit |
| 148 | + ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg |
| 149 | + ; NOLIMIT-NEXT: {{ $}} |
| 150 | + ; NOLIMIT-NEXT: bb.6: |
| 151 | + ; NOLIMIT-NEXT: successors: |
| 152 | + ; NOLIMIT-NEXT: {{ $}} |
| 153 | + ; NOLIMIT-NEXT: bb.9: |
| 154 | + ; NOLIMIT-NEXT: successors: %bb.13(0x80000000) |
| 155 | + ; NOLIMIT-NEXT: {{ $}} |
| 156 | + ; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5 |
| 157 | + ; NOLIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 158 | + ; NOLIMIT-NEXT: JMP_1 %bb.13 |
| 159 | + ; NOLIMIT-NEXT: {{ $}} |
| 160 | + ; NOLIMIT-NEXT: bb.10: |
| 161 | + ; NOLIMIT-NEXT: successors: %bb.13(0x80000000) |
| 162 | + ; NOLIMIT-NEXT: {{ $}} |
| 163 | + ; NOLIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5 |
| 164 | + ; NOLIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 165 | + ; NOLIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags |
| 166 | + ; NOLIMIT-NEXT: JMP_1 %bb.13 |
| 167 | + ; NOLIMIT-NEXT: {{ $}} |
| 168 | + ; NOLIMIT-NEXT: bb.11: |
| 169 | + ; NOLIMIT-NEXT: successors: %bb.13(0x80000000) |
| 170 | + ; NOLIMIT-NEXT: {{ $}} |
| 171 | + ; NOLIMIT-NEXT: [[PHI2:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5 |
| 172 | + ; NOLIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 173 | + ; NOLIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags |
| 174 | + ; NOLIMIT-NEXT: JMP_1 %bb.13 |
| 175 | + ; NOLIMIT-NEXT: {{ $}} |
| 176 | + ; NOLIMIT-NEXT: bb.12: |
| 177 | + ; NOLIMIT-NEXT: successors: %bb.13(0x80000000) |
| 178 | + ; NOLIMIT-NEXT: {{ $}} |
| 179 | + ; NOLIMIT-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5 |
| 180 | + ; NOLIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg |
| 181 | + ; NOLIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags |
| 182 | + ; NOLIMIT-NEXT: {{ $}} |
| 183 | + ; NOLIMIT-NEXT: bb.13: |
| 184 | + ; NOLIMIT-NEXT: [[PHI4:%[0-9]+]]:gr32 = PHI [[PHI]], %bb.9, [[PHI1]], %bb.10, [[PHI2]], %bb.11, [[PHI3]], %bb.12 |
| 185 | + ; NOLIMIT-NEXT: [[PHI5:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9 |
| 186 | + ; NOLIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI5]], [[PHI4]], implicit-def dead $eflags |
| 187 | + ; NOLIMIT-NEXT: $eax = COPY [[OR32rr]] |
| 188 | + ; NOLIMIT-NEXT: RET 0, $eax |
| 189 | + bb.0: |
| 190 | + liveins: $rdi, $esi |
| 191 | +
|
| 192 | + %11:gr32 = COPY $esi |
| 193 | + %10:gr64 = COPY $rdi |
| 194 | + %13:gr32 = SHR32ri %11, 1, implicit-def dead $eflags |
| 195 | + %14:gr32 = AND32ri %13, 7, implicit-def dead $eflags |
| 196 | + %12:gr64_nosp = SUBREG_TO_REG 0, killed %14, %subreg.sub_32bit |
| 197 | +
|
| 198 | + bb.1: |
| 199 | + successors: %bb.2, %bb.3, %bb.4, %bb.5 |
| 200 | +
|
| 201 | + JMP64m $noreg, 8, %12, %jump-table.0, $noreg |
| 202 | +
|
| 203 | + bb.2: |
| 204 | + %0:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 205 | + JMP_1 %bb.7 |
| 206 | +
|
| 207 | + bb.3: |
| 208 | + %17:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 209 | + %1:gr32 = SHR32ri %17, 1, implicit-def dead $eflags |
| 210 | + JMP_1 %bb.7 |
| 211 | +
|
| 212 | + bb.4: |
| 213 | + %16:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 214 | + %2:gr32 = SHR32ri %16, 2, implicit-def dead $eflags |
| 215 | + JMP_1 %bb.7 |
| 216 | +
|
| 217 | + bb.5: |
| 218 | + %15:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 219 | + %3:gr32 = SHR32ri %15, 3, implicit-def dead $eflags |
| 220 | + JMP_1 %bb.7 |
| 221 | +
|
| 222 | + bb.6: |
| 223 | + successors: |
| 224 | +
|
| 225 | + bb.7: |
| 226 | + %4:gr32 = PHI %3, %bb.5, %2, %bb.4, %1, %bb.3, %0, %bb.2 |
| 227 | + %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags |
| 228 | + %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags |
| 229 | + %18:gr64_nosp = SUBREG_TO_REG 0, killed %20, %subreg.sub_32bit |
| 230 | +
|
| 231 | + bb.8: |
| 232 | + successors: %bb.9, %bb.10, %bb.11, %bb.12 |
| 233 | +
|
| 234 | + JMP64m $noreg, 8, %18, %jump-table.1, $noreg |
| 235 | +
|
| 236 | + bb.9: |
| 237 | + %5:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 238 | + JMP_1 %bb.13 |
| 239 | +
|
| 240 | + bb.10: |
| 241 | + %23:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 242 | + %6:gr32 = SHR32ri %23, 1, implicit-def dead $eflags |
| 243 | + JMP_1 %bb.13 |
| 244 | +
|
| 245 | + bb.11: |
| 246 | + %22:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 247 | + %7:gr32 = SHR32ri %22, 2, implicit-def dead $eflags |
| 248 | + JMP_1 %bb.13 |
| 249 | +
|
| 250 | + bb.12: |
| 251 | + %21:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg |
| 252 | + %8:gr32 = SHR32ri %21, 6, implicit-def dead $eflags |
| 253 | +
|
| 254 | + bb.13: |
| 255 | + %9:gr32 = PHI %8, %bb.12, %7, %bb.11, %6, %bb.10, %5, %bb.9 |
| 256 | + %24:gr32 = OR32rr %9, %4, implicit-def dead $eflags |
| 257 | + $eax = COPY %24 |
| 258 | + RET 0, $eax |
| 259 | +
|
| 260 | +... |
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