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[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default
The standard libcalls for half to float and float to half conversion are __extendhfsf2 and __truncsfhf2. However, LLVM currently uses __gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these libcalls are ARM-ism and only provided by libgcc on that platform. compiler-rt always provides both libcalls. Use the standard libcalls by default, and only use the __gnu libcalls on ARM to improve libgcc compatibilty. We encounted this issue with MLIR execution engine test failures on Power 8.
1 parent 9d92bea commit 4c582d1

36 files changed

+1123
-1143
lines changed

‎llvm/include/llvm/IR/RuntimeLibcalls.def

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -384,8 +384,8 @@ HANDLE_LIBCALL(FPEXT_F16_F128, "__extendhftf2")
384384
HANDLE_LIBCALL(FPEXT_F16_F80, "__extendhfxf2")
385385
HANDLE_LIBCALL(FPEXT_F32_F64, "__extendsfdf2")
386386
HANDLE_LIBCALL(FPEXT_F16_F64, "__extendhfdf2")
387-
HANDLE_LIBCALL(FPEXT_F16_F32, "__gnu_h2f_ieee")
388-
HANDLE_LIBCALL(FPROUND_F32_F16, "__gnu_f2h_ieee")
387+
HANDLE_LIBCALL(FPEXT_F16_F32, "__extendhfsf2")
388+
HANDLE_LIBCALL(FPROUND_F32_F16, "__truncsfhf2")
389389
HANDLE_LIBCALL(FPROUND_F64_F16, "__truncdfhf2")
390390
HANDLE_LIBCALL(FPROUND_F80_F16, "__truncxfhf2")
391391
HANDLE_LIBCALL(FPROUND_F128_F16, "__trunctfhf2")

‎llvm/lib/IR/RuntimeLibcalls.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -170,9 +170,6 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
170170
// TODO: BridgeOS should be included in isOSDarwin.
171171
setLibcallName(RTLIB::EXP10_F32, "__exp10f");
172172
setLibcallName(RTLIB::EXP10_F64, "__exp10");
173-
} else {
174-
setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
175-
setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
176173
}
177174

178175
if (TT.isGNUEnvironment() || TT.isOSFuchsia() ||

‎llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -767,6 +767,9 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
767767
setLibcallName(LC.Op, LC.Name);
768768
setLibcallCallingConv(LC.Op, LC.CC);
769769
}
770+
} else if (!Subtarget->isTargetMachO()) {
771+
setLibcallName(RTLIB::FPROUND_F32_F16, "__gnu_f2h_ieee");
772+
setLibcallName(RTLIB::FPEXT_F16_F32, "__gnu_h2f_ieee");
770773
}
771774

772775
if (Subtarget->isThumb1Only())

‎llvm/lib/Target/Hexagon/HexagonISelLowering.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1886,11 +1886,6 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
18861886
setLibcallName(RTLIB::SQRT_F32, "__hexagon_fast2_sqrtf");
18871887
else
18881888
setLibcallName(RTLIB::SQRT_F32, "__hexagon_sqrtf");
1889-
1890-
// Routines to handle fp16 storage type.
1891-
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
1892-
setLibcallName(RTLIB::FPROUND_F64_F16, "__truncdfhf2");
1893-
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
18941889
}
18951890

18961891
const char* HexagonTargetLowering::getTargetNodeName(unsigned Opcode) const {

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1549,9 +1549,6 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
15491549
if (Subtarget.useRVVForFixedLengthVectors())
15501550
setTargetDAGCombine(ISD::BITCAST);
15511551

1552-
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
1553-
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
1554-
15551552
// Disable strict node mutation.
15561553
IsStrictFPEnabled = true;
15571554
EnableExtLdPromotion = true;

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -377,11 +377,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
377377

378378
setMaxAtomicSizeInBitsSupported(64);
379379

380-
// Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
381-
// consistent with the f64 and f128 names.
382-
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
383-
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
384-
385380
// Define the emscripten name for return address helper.
386381
// TODO: when implementing other Wasm backends, make this generic or only do
387382
// this on emscripten depending on what they end up doing.

‎llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -537,10 +537,6 @@ struct StaticLibcallNameMap {
537537
Map[NameLibcall.first] = NameLibcall.second;
538538
}
539539
}
540-
// Override the __gnu_f2h_ieee/__gnu_h2f_ieee names so that the f32 name is
541-
// consistent with the f64 and f128 names.
542-
Map["__extendhfsf2"] = RTLIB::FPEXT_F16_F32;
543-
Map["__truncsfhf2"] = RTLIB::FPROUND_F32_F16;
544540

545541
Map["emscripten_return_address"] = RTLIB::RETURN_ADDRESS;
546542
}

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -736,9 +736,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
736736
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f32, Custom);
737737
setOperationAction(ISD::STRICT_FP_EXTEND, MVT::f64, Custom);
738738

739-
setLibcallName(RTLIB::FPROUND_F32_F16, "__truncsfhf2");
740-
setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
741-
742739
// Lower this to MOVMSK plus an AND.
743740
setOperationAction(ISD::FGETSIGN, MVT::i64, Custom);
744741
setOperationAction(ISD::FGETSIGN, MVT::i32, Custom);

‎llvm/test/CodeGen/AArch64/16bit-float-promotion-with-nofp.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ define half @f2h(float %a) {
77
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
88
; CHECK-NEXT: .cfi_def_cfa_offset 16
99
; CHECK-NEXT: .cfi_offset w30, -16
10-
; CHECK-NEXT: bl __gnu_f2h_ieee
10+
; CHECK-NEXT: bl __truncsfhf2
1111
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
1212
; CHECK-NEXT: ret
1313
entry:

‎llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -60,13 +60,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
6060
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
6161
; SOFTFP-NOLSE-NEXT: mov w22, w0
6262
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
63-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
63+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6464
; SOFTFP-NOLSE-NEXT: mov w21, w0
6565
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
66-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
66+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6767
; SOFTFP-NOLSE-NEXT: mov w1, w21
6868
; SOFTFP-NOLSE-NEXT: bl __addsf3
69-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
69+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
7070
; SOFTFP-NOLSE-NEXT: mov w8, w0
7171
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
7272
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -148,13 +148,13 @@ define half @test_atomicrmw_fadd_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
148148
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
149149
; SOFTFP-NOLSE-NEXT: mov w22, w0
150150
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
151-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
151+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
152152
; SOFTFP-NOLSE-NEXT: mov w21, w0
153153
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
154-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
154+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
155155
; SOFTFP-NOLSE-NEXT: mov w1, w21
156156
; SOFTFP-NOLSE-NEXT: bl __addsf3
157-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
157+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
158158
; SOFTFP-NOLSE-NEXT: mov w8, w0
159159
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
160160
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -712,22 +712,22 @@ define <2 x half> @test_atomicrmw_fadd_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
712712
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
713713
; SOFTFP-NOLSE-NEXT: // Child Loop BB7_3 Depth 2
714714
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
715-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
715+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
716716
; SOFTFP-NOLSE-NEXT: mov w24, w0
717717
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
718-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
718+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
719719
; SOFTFP-NOLSE-NEXT: mov w1, w24
720720
; SOFTFP-NOLSE-NEXT: bl __addsf3
721-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
721+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
722722
; SOFTFP-NOLSE-NEXT: mov w24, w0
723723
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
724-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
724+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
725725
; SOFTFP-NOLSE-NEXT: mov w25, w0
726726
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
727-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
727+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
728728
; SOFTFP-NOLSE-NEXT: mov w1, w25
729729
; SOFTFP-NOLSE-NEXT: bl __addsf3
730-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
730+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
731731
; SOFTFP-NOLSE-NEXT: mov w8, w22
732732
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
733733
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16

‎llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -62,13 +62,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
6262
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
6363
; SOFTFP-NOLSE-NEXT: mov w22, w0
6464
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
65-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
65+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6666
; SOFTFP-NOLSE-NEXT: mov w21, w0
6767
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
68-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
68+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6969
; SOFTFP-NOLSE-NEXT: mov w1, w21
7070
; SOFTFP-NOLSE-NEXT: bl fmaxf
71-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
71+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
7272
; SOFTFP-NOLSE-NEXT: mov w8, w0
7373
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
7474
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -150,13 +150,13 @@ define half @test_atomicrmw_fmax_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
150150
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
151151
; SOFTFP-NOLSE-NEXT: mov w22, w0
152152
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
153-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
153+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
154154
; SOFTFP-NOLSE-NEXT: mov w21, w0
155155
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
156-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
156+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
157157
; SOFTFP-NOLSE-NEXT: mov w1, w21
158158
; SOFTFP-NOLSE-NEXT: bl fmaxf
159-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
159+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
160160
; SOFTFP-NOLSE-NEXT: mov w8, w0
161161
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
162162
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmax_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
592592
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
593593
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
594594
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
595-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
595+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
596596
; SOFTFP-NOLSE-NEXT: mov w24, w0
597597
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
598-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
598+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
599599
; SOFTFP-NOLSE-NEXT: mov w1, w24
600600
; SOFTFP-NOLSE-NEXT: bl fmaxf
601-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
601+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
602602
; SOFTFP-NOLSE-NEXT: mov w24, w0
603603
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
604-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
604+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
605605
; SOFTFP-NOLSE-NEXT: mov w25, w0
606606
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
607-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
607+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
608608
; SOFTFP-NOLSE-NEXT: mov w1, w25
609609
; SOFTFP-NOLSE-NEXT: bl fmaxf
610-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
610+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
611611
; SOFTFP-NOLSE-NEXT: mov w8, w22
612612
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
613613
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16

‎llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -62,13 +62,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
6262
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
6363
; SOFTFP-NOLSE-NEXT: mov w22, w0
6464
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
65-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
65+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6666
; SOFTFP-NOLSE-NEXT: mov w21, w0
6767
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
68-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
68+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6969
; SOFTFP-NOLSE-NEXT: mov w1, w21
7070
; SOFTFP-NOLSE-NEXT: bl fminf
71-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
71+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
7272
; SOFTFP-NOLSE-NEXT: mov w8, w0
7373
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
7474
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -150,13 +150,13 @@ define half @test_atomicrmw_fmin_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
150150
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
151151
; SOFTFP-NOLSE-NEXT: mov w22, w0
152152
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
153-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
153+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
154154
; SOFTFP-NOLSE-NEXT: mov w21, w0
155155
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
156-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
156+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
157157
; SOFTFP-NOLSE-NEXT: mov w1, w21
158158
; SOFTFP-NOLSE-NEXT: bl fminf
159-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
159+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
160160
; SOFTFP-NOLSE-NEXT: mov w8, w0
161161
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
162162
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -592,22 +592,22 @@ define <2 x half> @test_atomicrmw_fmin_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
592592
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
593593
; SOFTFP-NOLSE-NEXT: // Child Loop BB6_3 Depth 2
594594
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
595-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
595+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
596596
; SOFTFP-NOLSE-NEXT: mov w24, w0
597597
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
598-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
598+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
599599
; SOFTFP-NOLSE-NEXT: mov w1, w24
600600
; SOFTFP-NOLSE-NEXT: bl fminf
601-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
601+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
602602
; SOFTFP-NOLSE-NEXT: mov w24, w0
603603
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
604-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
604+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
605605
; SOFTFP-NOLSE-NEXT: mov w25, w0
606606
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
607-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
607+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
608608
; SOFTFP-NOLSE-NEXT: mov w1, w25
609609
; SOFTFP-NOLSE-NEXT: bl fminf
610-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
610+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
611611
; SOFTFP-NOLSE-NEXT: mov w8, w22
612612
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
613613
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16

‎llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -60,13 +60,13 @@ define half @test_atomicrmw_fsub_f16_seq_cst_align2(ptr %ptr, half %value) #0 {
6060
; SOFTFP-NOLSE-NEXT: // Child Loop BB0_3 Depth 2
6161
; SOFTFP-NOLSE-NEXT: mov w22, w0
6262
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
63-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
63+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6464
; SOFTFP-NOLSE-NEXT: mov w21, w0
6565
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
66-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
66+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
6767
; SOFTFP-NOLSE-NEXT: mov w1, w21
6868
; SOFTFP-NOLSE-NEXT: bl __subsf3
69-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
69+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
7070
; SOFTFP-NOLSE-NEXT: mov w8, w0
7171
; SOFTFP-NOLSE-NEXT: .LBB0_3: // %cmpxchg.start
7272
; SOFTFP-NOLSE-NEXT: // Parent Loop BB0_2 Depth=1
@@ -148,13 +148,13 @@ define half @test_atomicrmw_fsub_f16_seq_cst_align4(ptr %ptr, half %value) #0 {
148148
; SOFTFP-NOLSE-NEXT: // Child Loop BB1_3 Depth 2
149149
; SOFTFP-NOLSE-NEXT: mov w22, w0
150150
; SOFTFP-NOLSE-NEXT: and w0, w20, #0xffff
151-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
151+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
152152
; SOFTFP-NOLSE-NEXT: mov w21, w0
153153
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
154-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
154+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
155155
; SOFTFP-NOLSE-NEXT: mov w1, w21
156156
; SOFTFP-NOLSE-NEXT: bl __subsf3
157-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
157+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
158158
; SOFTFP-NOLSE-NEXT: mov w8, w0
159159
; SOFTFP-NOLSE-NEXT: .LBB1_3: // %cmpxchg.start
160160
; SOFTFP-NOLSE-NEXT: // Parent Loop BB1_2 Depth=1
@@ -712,22 +712,22 @@ define <2 x half> @test_atomicrmw_fsub_v2f16_seq_cst_align4(ptr %ptr, <2 x half>
712712
; SOFTFP-NOLSE-NEXT: // =>This Loop Header: Depth=1
713713
; SOFTFP-NOLSE-NEXT: // Child Loop BB7_3 Depth 2
714714
; SOFTFP-NOLSE-NEXT: and w0, w19, #0xffff
715-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
715+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
716716
; SOFTFP-NOLSE-NEXT: mov w24, w0
717717
; SOFTFP-NOLSE-NEXT: and w0, w23, #0xffff
718-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
718+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
719719
; SOFTFP-NOLSE-NEXT: mov w1, w24
720720
; SOFTFP-NOLSE-NEXT: bl __subsf3
721-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
721+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
722722
; SOFTFP-NOLSE-NEXT: mov w24, w0
723723
; SOFTFP-NOLSE-NEXT: and w0, w21, #0xffff
724-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
724+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
725725
; SOFTFP-NOLSE-NEXT: mov w25, w0
726726
; SOFTFP-NOLSE-NEXT: and w0, w22, #0xffff
727-
; SOFTFP-NOLSE-NEXT: bl __gnu_h2f_ieee
727+
; SOFTFP-NOLSE-NEXT: bl __extendhfsf2
728728
; SOFTFP-NOLSE-NEXT: mov w1, w25
729729
; SOFTFP-NOLSE-NEXT: bl __subsf3
730-
; SOFTFP-NOLSE-NEXT: bl __gnu_f2h_ieee
730+
; SOFTFP-NOLSE-NEXT: bl __truncsfhf2
731731
; SOFTFP-NOLSE-NEXT: mov w8, w22
732732
; SOFTFP-NOLSE-NEXT: bfi w0, w24, #16, #16
733733
; SOFTFP-NOLSE-NEXT: bfi w8, w23, #16, #16

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