Skip to content

Commit 169ef33

Browse files
wangpc-ppwangpc-pp
committed
[RISCV] Add B extension
It seems that we have `B` extension again: https://github.com/riscv/riscv-b According to the spec, `B` extension represents the collection of the `Zba`, `Zbb`, `Zbs` extensions.
1 parent a536743 commit 169ef33

File tree

7 files changed

+30
-9
lines changed

7 files changed

+30
-9
lines changed

‎clang/test/Driver/riscv-arch.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -231,11 +231,6 @@
231231
// RV32-STD: error: invalid arch name 'rv32imqc',
232232
// RV32-STD: unsupported standard user-level extension 'q'
233233

234-
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32ib -### %s \
235-
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-B %s
236-
// RV32-B: error: invalid arch name 'rv32ib',
237-
// RV32-B: unsupported standard user-level extension 'b'
238-
239234
// RUN: not %clang --target=riscv32-unknown-elf -march=rv32xabc -### %s \
240235
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32X %s
241236
// RV32X: error: invalid arch name 'rv32xabc',

‎clang/test/Preprocessor/riscv-target-features.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
// CHECK-NOT: __riscv_64e {{.*$}}
88
// CHECK-NOT: __riscv_a {{.*$}}
99
// CHECK-NOT: __riscv_atomic
10+
// CHECK-NOT: __riscv_b {{.*$}}
1011
// CHECK-NOT: __riscv_c {{.*$}}
1112
// CHECK-NOT: __riscv_compressed {{.*$}}
1213
// CHECK-NOT: __riscv_d {{.*$}}
@@ -191,6 +192,17 @@
191192
// CHECK-A-EXT: __riscv_a 2001000{{$}}
192193
// CHECK-A-EXT: __riscv_atomic 1
193194

195+
// RUN: %clang --target=riscv32-unknown-linux-gnu \
196+
// RUN: -march=rv32ib -x c -E -dM %s \
197+
// RUN: -o - | FileCheck --check-prefix=CHECK-B-EXT %s
198+
// RUN: %clang --target=riscv64-unknown-linux-gnu \
199+
// RUN: -march=rv64ib -x c -E -dM %s \
200+
// RUN: -o - | FileCheck --check-prefix=CHECK-B-EXT %s
201+
// CHECK-B-EXT: __riscv_b 1000000{{$}}
202+
// CHECK-B-EXT: __riscv_zba 1000000{{$}}
203+
// CHECK-B-EXT: __riscv_zbb 1000000{{$}}
204+
// CHECK-B-EXT: __riscv_zbs 1000000{{$}}
205+
194206
// RUN: %clang --target=riscv32-unknown-linux-gnu \
195207
// RUN: -march=rv32ic -E -dM %s \
196208
// RUN: -o - | FileCheck --check-prefix=CHECK-C-EXT %s

‎llvm/docs/RISCVUsage.rst

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,7 @@ on support follow.
8585
Extension Status
8686
================ =================================================================
8787
``A`` Supported
88+
``B`` Supported
8889
``C`` Supported
8990
``D`` Supported
9091
``F`` Supported

‎llvm/lib/Support/RISCVISAInfo.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@ static const char *RISCVGImplications[] = {
5252
// NOTE: This table should be sorted alphabetically by extension name.
5353
static const RISCVSupportedExtension SupportedExtensions[] = {
5454
{"a", {2, 1}},
55+
{"b", {1, 0}},
5556
{"c", {2, 0}},
5657
{"d", {2, 2}},
5758
{"e", {2, 0}},
@@ -1106,6 +1107,7 @@ Error RISCVISAInfo::checkDependency() {
11061107
return Error::success();
11071108
}
11081109

1110+
static const char *ImpliedExtsB[] = {"zba", "zbb", "zbs"};
11091111
static const char *ImpliedExtsD[] = {"f"};
11101112
static const char *ImpliedExtsF[] = {"zicsr"};
11111113
static const char *ImpliedExtsV[] = {"zvl128b", "zve64d"};
@@ -1181,6 +1183,7 @@ struct ImpliedExtsEntry {
11811183

11821184
// Note: The table needs to be sorted by name.
11831185
static constexpr ImpliedExtsEntry ImpliedExts[] = {
1186+
{{"b"}, {ImpliedExtsB}},
11841187
{{"d"}, {ImpliedExtsD}},
11851188
{{"f"}, {ImpliedExtsF}},
11861189
{{"v"}, {ImpliedExtsV}},

‎llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -430,6 +430,14 @@ def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
430430

431431
// Bitmanip Extensions for Cryptography Extensions
432432

433+
def FeatureStdExtB
434+
: SubtargetFeature<"b", "HasStdExtB", "true",
435+
"'B' (the collection of the Zba, Zbb, Zbs extensions)",
436+
[FeatureStdExtZba, FeatureStdExtZbb, FeatureStdExtZbs]>;
437+
def HasStdExtB : Predicate<"Subtarget->hasStdExtB()">,
438+
AssemblerPredicate<(all_of FeatureStdExtB),
439+
"'B' (the collection of the Zba, Zbb, Zbs extensions)">;
440+
433441
def FeatureStdExtZbkb
434442
: SubtargetFeature<"zbkb", "HasStdExtZbkb", "true",
435443
"'Zbkb' (Bitmanip instructions for Cryptography)">;

‎llvm/test/CodeGen/RISCV/attributes.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
; RUN: llc -mtriple=riscv32 -mattr=+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV32ZMMUL %s
66
; RUN: llc -mtriple=riscv32 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV32MZMMUL %s
77
; RUN: llc -mtriple=riscv32 -mattr=+a %s -o - | FileCheck --check-prefixes=CHECK,RV32A %s
8+
; RUN: llc -mtriple=riscv32 -mattr=+b %s -o - | FileCheck --check-prefixes=CHECK,RV32B %s
89
; RUN: llc -mtriple=riscv32 -mattr=+f %s -o - | FileCheck --check-prefixes=CHECK,RV32F %s
910
; RUN: llc -mtriple=riscv32 -mattr=+d %s -o - | FileCheck --check-prefixes=CHECK,RV32D %s
1011
; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefixes=CHECK,RV32C %s
@@ -129,6 +130,7 @@
129130
; RUN: llc -mtriple=riscv64 -mattr=+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64ZMMUL %s
130131
; RUN: llc -mtriple=riscv64 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64MZMMUL %s
131132
; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefixes=CHECK,RV64A %s
133+
; RUN: llc -mtriple=riscv64 -mattr=+b %s -o - | FileCheck --check-prefixes=CHECK,RV64B %s
132134
; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefixes=CHECK,RV64F %s
133135
; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefixes=CHECK,RV64D %s
134136
; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefixes=CHECK,RV64C %s
@@ -260,6 +262,7 @@
260262
; RV32ZMMUL: .attribute 5, "rv32i2p1_zmmul1p0"
261263
; RV32MZMMUL: .attribute 5, "rv32i2p1_m2p0_zmmul1p0"
262264
; RV32A: .attribute 5, "rv32i2p1_a2p1"
265+
; RV32B: .attribute 5, "rv32i2p1_b1p0_zba1p0_zbb1p0_zbs1p0"
263266
; RV32F: .attribute 5, "rv32i2p1_f2p2_zicsr2p0"
264267
; RV32D: .attribute 5, "rv32i2p1_f2p2_d2p2_zicsr2p0"
265268
; RV32C: .attribute 5, "rv32i2p1_c2p0"
@@ -383,6 +386,7 @@
383386
; RV64ZMMUL: .attribute 5, "rv64i2p1_zmmul1p0"
384387
; RV64MZMMUL: .attribute 5, "rv64i2p1_m2p0_zmmul1p0"
385388
; RV64A: .attribute 5, "rv64i2p1_a2p1"
389+
; RV64B: .attribute 5, "rv64i2p1_b1p0_zba1p0_zbb1p0_zbs1p0"
386390
; RV64F: .attribute 5, "rv64i2p1_f2p2_zicsr2p0"
387391
; RV64D: .attribute 5, "rv64i2p1_f2p2_d2p2_zicsr2p0"
388392
; RV64C: .attribute 5, "rv64i2p1_c2p0"

‎llvm/unittests/Support/RISCVISAInfoTest.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -204,8 +204,6 @@ TEST(ParseArchString, AcceptsSupportedBaseISAsAndSetsXLenAndFLen) {
204204
}
205205

206206
TEST(ParseArchString, RejectsUnrecognizedExtensionNamesByDefault) {
207-
EXPECT_EQ(toString(RISCVISAInfo::parseArchString("rv64ib", true).takeError()),
208-
"unsupported standard user-level extension 'b'");
209207
EXPECT_EQ(
210208
toString(
211209
RISCVISAInfo::parseArchString("rv32i_zmadeup", true).takeError()),
@@ -236,8 +234,7 @@ TEST(ParseArchString, RejectsUnrecognizedExtensionNamesByDefault) {
236234
}
237235

238236
TEST(ParseArchString, IgnoresUnrecognizedExtensionNamesWithIgnoreUnknown) {
239-
for (StringRef Input : {"rv32ib", "rv32i_zmadeup",
240-
"rv64i_smadeup", "rv64i_xmadeup"}) {
237+
for (StringRef Input : {"rv32i_zmadeup", "rv64i_smadeup", "rv64i_xmadeup"}) {
241238
auto MaybeISAInfo = RISCVISAInfo::parseArchString(Input, true, false, true);
242239
ASSERT_THAT_EXPECTED(MaybeISAInfo, Succeeded());
243240
RISCVISAInfo &Info = **MaybeISAInfo;
@@ -747,6 +744,7 @@ R"(All available -march extensions for RISC-V
747744
f 2.2
748745
d 2.2
749746
c 2.0
747+
b 1.0
750748
v 1.0
751749
h 1.0
752750
zic64b 1.0

0 commit comments

Comments
 (0)