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mikaoPmikaoP
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Do not overwrite task_args when doing translation. Allocate in the stack
Closes llvm#142
1 parent 1a8ca94 commit f04b671

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3 files changed

+141
-71
lines changed

3 files changed

+141
-71
lines changed

‎llvm/lib/Transforms/OmpSs/OmpSsTransform.cpp

Lines changed: 64 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1414,14 +1414,49 @@ struct OmpSs {
14141414
}
14151415
}
14161416

1417+
// task_args cannot be modified. This function creates
1418+
// new variables where the translation is performed.
1419+
static void dupTranlationNeededArgs(
1420+
IRBuilder<> &IRBEntry, const DirectiveDependsInfo &DependsInfo,
1421+
const MapVector<Value *, size_t> &StructToIdxMap,
1422+
SmallVector<Value *, 4> &UnpackParams) {
1423+
1424+
for (auto &DepInfo : DependsInfo.List) {
1425+
if (DepInfo->isReduction()) {
1426+
Value *DepBaseDSA = DepInfo->Base;
1427+
size_t Idx = StructToIdxMap.lookup(DepBaseDSA);
1428+
Value *UnpackedDSA = UnpackParams[Idx];
1429+
if (auto *LUnpackedDSA = dyn_cast<LoadInst>(UnpackedDSA)) {
1430+
Value *NewDepBaseDSA =
1431+
IRBEntry.CreateAlloca(
1432+
LUnpackedDSA->getType(), nullptr, "tlate." + LUnpackedDSA->getName());
1433+
IRBEntry.CreateStore(LUnpackedDSA, NewDepBaseDSA);
1434+
1435+
UnpackParams[Idx] =
1436+
IRBEntry.CreateLoad(LUnpackedDSA->getType(), NewDepBaseDSA);
1437+
} else {
1438+
Value *NewDepBaseDSA =
1439+
IRBEntry.CreateAlloca(
1440+
UnpackedDSA->getType()->getPointerElementType(),
1441+
nullptr, "tlate." + UnpackedDSA->getName());
1442+
IRBEntry.CreateStore(
1443+
IRBEntry.CreateLoad(
1444+
UnpackedDSA->getType()->getPointerElementType(), UnpackedDSA),
1445+
NewDepBaseDSA);
1446+
1447+
UnpackParams[Idx] = NewDepBaseDSA;
1448+
}
1449+
}
1450+
}
1451+
}
1452+
14171453
// Given an Outline and Unpack Functions it unpacks DSAs in Outline
14181454
// and builds a call to Unpack
14191455
void olCallToUnpack(Module &M, const DirectiveInfo &DirInfo,
14201456
const MapVector<Value *, size_t> &StructToIdxMap,
14211457
Function *OlFunc, Function *UnpackFunc,
14221458
bool IsTaskFunc=false) {
14231459
BasicBlock::Create(M.getContext(), "entry", OlFunc);
1424-
IRBuilder<> BBBuilder(&OlFunc->getEntryBlock());
14251460

14261461
// First arg is the nanos_task_args
14271462
Function::arg_iterator AI = OlFunc->arg_begin();
@@ -1440,28 +1475,46 @@ struct OmpSs {
14401475
// Preserve the params before translation. And replace used after build all
14411476
// compute_dep calls
14421477
// NOTE: this assumes UnpackParams can be indexed with StructToIdxMap
1443-
SmallVector<Value *, 4> UnpackParamsCopy(UnpackParams);
1478+
// IRBuilder<> BBBuilder(&OlFunc->getEntryBlock());
14441479

14451480
BasicBlock *IfThenBB = BasicBlock::Create(M.getContext(), "", OlFunc);
14461481
BasicBlock *IfEndBB = BasicBlock::Create(M.getContext(), "", OlFunc);
14471482

1483+
// Builders
1484+
IRBuilder<> IRBEntry(&OlFunc->getEntryBlock());
1485+
IRBuilder<> IRBIfThen(IfThenBB);
1486+
IRBuilder<> IRBIfEnd(IfEndBB);
1487+
1488+
// Build the skeleton
14481489
Value *AddrTranslationTable = &*(OlFunc->arg_end() - 1);
1449-
Value *Cmp = BBBuilder.CreateICmpNE(
1490+
Value *Cmp = IRBEntry.CreateICmpNE(
14501491
AddrTranslationTable, Constant::getNullValue(AddrTranslationTable->getType()));
1451-
BBBuilder.CreateCondBr(Cmp, IfThenBB, IfEndBB);
1492+
IRBEntry.CreateCondBr(Cmp, IfThenBB, IfEndBB);
14521493

1453-
IRBuilder<> IRBIfThen(IfThenBB);
1454-
IRBuilder<> IRBIfEnd(IfEndBB);
1494+
IRBIfThen.CreateBr(IfEndBB);
1495+
IRBIfEnd.CreateRetVoid();
1496+
1497+
// Reset insert points.
1498+
IRBEntry.SetInsertPoint(cast<Instruction>(Cmp));
1499+
IRBIfThen.SetInsertPoint(IfThenBB->getTerminator());
1500+
IRBIfEnd.SetInsertPoint(IfEndBB->getTerminator());
1501+
1502+
dupTranlationNeededArgs(IRBEntry, DependsInfo, StructToIdxMap, UnpackParams);
1503+
1504+
SmallVector<Value *, 4> UnpackParamsCopy(UnpackParams);
14551505

14561506
for (auto &DepInfo : DependsInfo.List) {
14571507
if (DepInfo->isReduction()) {
14581508
Value *DepBaseDSA = DepInfo->Base;
1509+
size_t Idx = StructToIdxMap.lookup(DepBaseDSA);
1510+
Value *&UnpackedDSA = UnpackParams[Idx];
14591511
translateDep(
14601512
IRBIfThen, IRBIfEnd, DepInfo.get(), DepBaseDSA,
1461-
UnpackParams[StructToIdxMap.lookup(DepBaseDSA)],
1513+
UnpackedDSA,
14621514
AddrTranslationTable, DirInfo.DirEnv.DepSymToIdx);
14631515
}
14641516
}
1517+
// Replaces dsa uses by unpacked values
14651518
for (Instruction &I : *IfThenBB) {
14661519
auto UnpackedIt = UnpackParamsCopy.begin();
14671520
for (auto It = StructToIdxMap.begin();
@@ -1470,14 +1523,13 @@ struct OmpSs {
14701523
I.replaceUsesOfWith(It->first, *UnpackedIt);
14711524
}
14721525
}
1473-
IRBIfThen.CreateBr(IfEndBB);
1474-
// Build TaskUnpackCall
1526+
// Build TaskUnpackCall with the translated values
14751527
IRBIfEnd.CreateCall(UnpackFunc, UnpackParams);
1476-
IRBIfEnd.CreateRetVoid();
14771528
} else {
14781529
// Build TaskUnpackCall
1479-
BBBuilder.CreateCall(UnpackFunc, UnpackParams);
1480-
BBBuilder.CreateRetVoid();
1530+
IRBuilder<> IRBEntry(&OlFunc->getEntryBlock());
1531+
IRBEntry.CreateCall(UnpackFunc, UnpackParams);
1532+
IRBEntry.CreateRetVoid();
14811533
}
14821534
}
14831535

‎llvm/test/Transforms/OmpSs/task_args_func_param.ll

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,13 @@ entry:
9595

9696
; CHECK: define internal void @nanos6_ol_task_region__Z3fooiRi0(%nanos6_task_args__Z3fooiRi0* %task_args, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table) {
9797
; CHECK: entry:
98-
; CHECK: %2 = call %struct._depend_unpack_t @compute_dep(i32* %load_gep_y)
98+
; CHECK-NEXT: %gep_y = getelementptr %nanos6_task_args__Z3fooiRi0, %nanos6_task_args__Z3fooiRi0* %task_args, i32 0, i32 0
99+
; CHECK-NEXT: %load_gep_y = load i32*, i32** %gep_y, align 8
100+
; CHECK-NEXT: %gep_x.addr = getelementptr %nanos6_task_args__Z3fooiRi0, %nanos6_task_args__Z3fooiRi0* %task_args, i32 0, i32 1
101+
; CHECK-NEXT: %tlate.load_gep_y = alloca i32*, align 8
102+
; CHECK-NEXT: store i32* %load_gep_y, i32** %tlate.load_gep_y, align 8
103+
; CHECK-NEXT: %0 = load i32*, i32** %tlate.load_gep_y, align 8
104+
; CHECK: %3 = call %struct._depend_unpack_t @compute_dep(i32* %0)
99105

100106
; CHECK: define internal void @nanos6_unpacked_constraints__Z3fooiRi0(i32* %y, i32* %x.addr, %nanos6_task_constraints_t* %constraints) {
101107
; CHECK: entry:

‎llvm/test/Transforms/OmpSs/task_reduction.ll

Lines changed: 70 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -49,45 +49,51 @@ entry:
4949
}
5050

5151
; CHECK: define internal void @nanos6_ol_task_region_foo0(%nanos6_task_args_foo0* %task_args, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table) {
52-
; CHECK-NEXT: entry:
52+
; CHECK: entry:
5353
; CHECK-NEXT: %gep_n.addr = getelementptr %nanos6_task_args_foo0, %nanos6_task_args_foo0* %task_args, i32 0, i32 0
5454
; CHECK-NEXT: %load_gep_n.addr = load i32*, i32** %gep_n.addr, align 8
5555
; CHECK-NEXT: %gep_vla = getelementptr %nanos6_task_args_foo0, %nanos6_task_args_foo0* %task_args, i32 0, i32 1
5656
; CHECK-NEXT: %load_gep_vla = load i32*, i32** %gep_vla, align 8
5757
; CHECK-NEXT: %capt_gep = getelementptr %nanos6_task_args_foo0, %nanos6_task_args_foo0* %task_args, i32 0, i32 2
5858
; CHECK-NEXT: %load_capt_gep = load i64, i64* %capt_gep, align 8
59-
; CHECK-NEXT: %0 = icmp ne %nanos6_address_translation_entry_t* %address_translation_table, null
60-
; CHECK-NEXT: br i1 %0, label %1, label %20
61-
; CHECK: 1: ; preds = %entry
62-
; CHECK-NEXT: %2 = call %struct._depend_unpack_t @compute_dep(i32* %load_gep_n.addr)
63-
; CHECK-NEXT: %3 = extractvalue %struct._depend_unpack_t %2, 0
59+
; CHECK-NEXT: %tlate.load_gep_n.addr = alloca i32*, align 8
60+
; CHECK-NEXT: store i32* %load_gep_n.addr, i32** %tlate.load_gep_n.addr, align 8
61+
; CHECK-NEXT: %0 = load i32*, i32** %tlate.load_gep_n.addr, align 8
62+
; CHECK-NEXT: %tlate.load_gep_vla = alloca i32*, align 8
63+
; CHECK-NEXT: store i32* %load_gep_vla, i32** %tlate.load_gep_vla, align 8
64+
; CHECK-NEXT: %1 = load i32*, i32** %tlate.load_gep_vla, align 8
65+
; CHECK-NEXT: %2 = icmp ne %nanos6_address_translation_entry_t* %address_translation_table, null
66+
; CHECK-NEXT: br i1 %2, label %3, label %22
67+
; CHECK: 3: ; preds = %entry
68+
; CHECK-NEXT: %4 = call %struct._depend_unpack_t @compute_dep(i32* %0)
69+
; CHECK-NEXT: %5 = extractvalue %struct._depend_unpack_t %4, 0
6470
; CHECK-NEXT: %local_lookup_n.addr = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 0, i32 0
65-
; CHECK-NEXT: %4 = load i64, i64* %local_lookup_n.addr, align 8
71+
; CHECK-NEXT: %6 = load i64, i64* %local_lookup_n.addr, align 8
6672
; CHECK-NEXT: %device_lookup_n.addr = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 0, i32 1
67-
; CHECK-NEXT: %5 = load i64, i64* %device_lookup_n.addr, align 8
68-
; CHECK-NEXT: %6 = bitcast i32* %3 to i8*
69-
; CHECK-NEXT: %7 = sub i64 0, %4
70-
; CHECK-NEXT: %8 = getelementptr i8, i8* %6, i64 %7
71-
; CHECK-NEXT: %9 = getelementptr i8, i8* %8, i64 %5
72-
; CHECK-NEXT: %10 = bitcast i8* %9 to i32*
73-
; CHECK-NEXT: store i32* %10, i32** %gep_n.addr, align 8
74-
; CHECK-NEXT: %11 = call %struct._depend_unpack_t.0 @compute_dep.1(i32* %load_gep_vla, i64 %load_capt_gep)
75-
; CHECK-NEXT: %12 = extractvalue %struct._depend_unpack_t.0 %11, 0
73+
; CHECK-NEXT: %7 = load i64, i64* %device_lookup_n.addr, align 8
74+
; CHECK-NEXT: %8 = bitcast i32* %5 to i8*
75+
; CHECK-NEXT: %9 = sub i64 0, %6
76+
; CHECK-NEXT: %10 = getelementptr i8, i8* %8, i64 %9
77+
; CHECK-NEXT: %11 = getelementptr i8, i8* %10, i64 %7
78+
; CHECK-NEXT: %12 = bitcast i8* %11 to i32*
79+
; CHECK-NEXT: store i32* %12, i32** %tlate.load_gep_n.addr, align 8
80+
; CHECK-NEXT: %13 = call %struct._depend_unpack_t.0 @compute_dep.1(i32* %1, i64 %load_capt_gep)
81+
; CHECK-NEXT: %14 = extractvalue %struct._depend_unpack_t.0 %13, 0
7682
; CHECK-NEXT: %local_lookup_vla = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 1, i32 0
77-
; CHECK-NEXT: %13 = load i64, i64* %local_lookup_vla, align 8
83+
; CHECK-NEXT: %15 = load i64, i64* %local_lookup_vla, align 8
7884
; CHECK-NEXT: %device_lookup_vla = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 1, i32 1
79-
; CHECK-NEXT: %14 = load i64, i64* %device_lookup_vla, align 8
80-
; CHECK-NEXT: %15 = bitcast i32* %12 to i8*
81-
; CHECK-NEXT: %16 = sub i64 0, %13
82-
; CHECK-NEXT: %17 = getelementptr i8, i8* %15, i64 %16
83-
; CHECK-NEXT: %18 = getelementptr i8, i8* %17, i64 %14
84-
; CHECK-NEXT: %19 = bitcast i8* %18 to i32*
85-
; CHECK-NEXT: store i32* %19, i32** %gep_vla, align 8
86-
; CHECK-NEXT: br label %20
87-
; CHECK: 20: ; preds = %1, %entry
88-
; CHECK-NEXT: %21 = load i32*, i32** %gep_n.addr, align 8
89-
; CHECK-NEXT: %22 = load i32*, i32** %gep_vla, align 8
90-
; CHECK-NEXT: call void @nanos6_unpacked_task_region_foo0(i32* %21, i32* %22, i64 %load_capt_gep, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table)
85+
; CHECK-NEXT: %16 = load i64, i64* %device_lookup_vla, align 8
86+
; CHECK-NEXT: %17 = bitcast i32* %14 to i8*
87+
; CHECK-NEXT: %18 = sub i64 0, %15
88+
; CHECK-NEXT: %19 = getelementptr i8, i8* %17, i64 %18
89+
; CHECK-NEXT: %20 = getelementptr i8, i8* %19, i64 %16
90+
; CHECK-NEXT: %21 = bitcast i8* %20 to i32*
91+
; CHECK-NEXT: store i32* %21, i32** %tlate.load_gep_vla, align 8
92+
; CHECK-NEXT: br label %22
93+
; CHECK: 22: ; preds = %3, %entry
94+
; CHECK-NEXT: %23 = load i32*, i32** %tlate.load_gep_n.addr, align 8
95+
; CHECK-NEXT: %24 = load i32*, i32** %tlate.load_gep_vla, align 8
96+
; CHECK-NEXT: call void @nanos6_unpacked_task_region_foo0(i32* %23, i32* %24, i64 %load_capt_gep, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table)
9197
; CHECK-NEXT: ret void
9298
; CHECK-NEXT: }
9399

@@ -238,45 +244,51 @@ entry:
238244
}
239245

240246
; CHECK: define internal void @nanos6_ol_task_region_foo10(%nanos6_task_args_foo10* %task_args, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table) {
241-
; CHECK-NEXT: entry:
247+
; CHECK: entry:
242248
; CHECK-NEXT: %gep_n.addr = getelementptr %nanos6_task_args_foo10, %nanos6_task_args_foo10* %task_args, i32 0, i32 0
243249
; CHECK-NEXT: %load_gep_n.addr = load i32*, i32** %gep_n.addr, align 8
244250
; CHECK-NEXT: %gep_vla = getelementptr %nanos6_task_args_foo10, %nanos6_task_args_foo10* %task_args, i32 0, i32 1
245251
; CHECK-NEXT: %load_gep_vla = load i32*, i32** %gep_vla, align 8
246252
; CHECK-NEXT: %capt_gep = getelementptr %nanos6_task_args_foo10, %nanos6_task_args_foo10* %task_args, i32 0, i32 2
247253
; CHECK-NEXT: %load_capt_gep = load i64, i64* %capt_gep, align 8
248-
; CHECK-NEXT: %0 = icmp ne %nanos6_address_translation_entry_t* %address_translation_table, null
249-
; CHECK-NEXT: br i1 %0, label %1, label %20
250-
; CHECK: 1: ; preds = %entry
251-
; CHECK-NEXT: %2 = call %struct._depend_unpack_t.1 @compute_dep.4(i32* %load_gep_n.addr)
252-
; CHECK-NEXT: %3 = extractvalue %struct._depend_unpack_t.1 %2, 0
254+
; CHECK-NEXT: %tlate.load_gep_n.addr = alloca i32*, align 8
255+
; CHECK-NEXT: store i32* %load_gep_n.addr, i32** %tlate.load_gep_n.addr, align 8
256+
; CHECK-NEXT: %0 = load i32*, i32** %tlate.load_gep_n.addr, align 8
257+
; CHECK-NEXT: %tlate.load_gep_vla = alloca i32*, align 8
258+
; CHECK-NEXT: store i32* %load_gep_vla, i32** %tlate.load_gep_vla, align 8
259+
; CHECK-NEXT: %1 = load i32*, i32** %tlate.load_gep_vla, align 8
260+
; CHECK-NEXT: %2 = icmp ne %nanos6_address_translation_entry_t* %address_translation_table, null
261+
; CHECK-NEXT: br i1 %2, label %3, label %22
262+
; CHECK: 3: ; preds = %entry
263+
; CHECK-NEXT: %4 = call %struct._depend_unpack_t.1 @compute_dep.4(i32* %0)
264+
; CHECK-NEXT: %5 = extractvalue %struct._depend_unpack_t.1 %4, 0
253265
; CHECK-NEXT: %local_lookup_n.addr = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 0, i32 0
254-
; CHECK-NEXT: %4 = load i64, i64* %local_lookup_n.addr, align 8
266+
; CHECK-NEXT: %6 = load i64, i64* %local_lookup_n.addr, align 8
255267
; CHECK-NEXT: %device_lookup_n.addr = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 0, i32 1
256-
; CHECK-NEXT: %5 = load i64, i64* %device_lookup_n.addr, align 8
257-
; CHECK-NEXT: %6 = bitcast i32* %3 to i8*
258-
; CHECK-NEXT: %7 = sub i64 0, %4
259-
; CHECK-NEXT: %8 = getelementptr i8, i8* %6, i64 %7
260-
; CHECK-NEXT: %9 = getelementptr i8, i8* %8, i64 %5
261-
; CHECK-NEXT: %10 = bitcast i8* %9 to i32*
262-
; CHECK-NEXT: store i32* %10, i32** %gep_n.addr, align 8
263-
; CHECK-NEXT: %11 = call %struct._depend_unpack_t.2 @compute_dep.5(i32* %load_gep_vla, i64 %load_capt_gep)
264-
; CHECK-NEXT: %12 = extractvalue %struct._depend_unpack_t.2 %11, 0
268+
; CHECK-NEXT: %7 = load i64, i64* %device_lookup_n.addr, align 8
269+
; CHECK-NEXT: %8 = bitcast i32* %5 to i8*
270+
; CHECK-NEXT: %9 = sub i64 0, %6
271+
; CHECK-NEXT: %10 = getelementptr i8, i8* %8, i64 %9
272+
; CHECK-NEXT: %11 = getelementptr i8, i8* %10, i64 %7
273+
; CHECK-NEXT: %12 = bitcast i8* %11 to i32*
274+
; CHECK-NEXT: store i32* %12, i32** %tlate.load_gep_n.addr, align 8
275+
; CHECK-NEXT: %13 = call %struct._depend_unpack_t.2 @compute_dep.5(i32* %1, i64 %load_capt_gep)
276+
; CHECK-NEXT: %14 = extractvalue %struct._depend_unpack_t.2 %13, 0
265277
; CHECK-NEXT: %local_lookup_vla = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 1, i32 0
266-
; CHECK-NEXT: %13 = load i64, i64* %local_lookup_vla, align 8
278+
; CHECK-NEXT: %15 = load i64, i64* %local_lookup_vla, align 8
267279
; CHECK-NEXT: %device_lookup_vla = getelementptr %nanos6_address_translation_entry_t, %nanos6_address_translation_entry_t* %address_translation_table, i32 1, i32 1
268-
; CHECK-NEXT: %14 = load i64, i64* %device_lookup_vla, align 8
269-
; CHECK-NEXT: %15 = bitcast i32* %12 to i8*
270-
; CHECK-NEXT: %16 = sub i64 0, %13
271-
; CHECK-NEXT: %17 = getelementptr i8, i8* %15, i64 %16
272-
; CHECK-NEXT: %18 = getelementptr i8, i8* %17, i64 %14
273-
; CHECK-NEXT: %19 = bitcast i8* %18 to i32*
274-
; CHECK-NEXT: store i32* %19, i32** %gep_vla, align 8
275-
; CHECK-NEXT: br label %20
276-
; CHECK: 20: ; preds = %1, %entry
277-
; CHECK-NEXT: %21 = load i32*, i32** %gep_n.addr, align 8
278-
; CHECK-NEXT: %22 = load i32*, i32** %gep_vla, align 8
279-
; CHECK-NEXT: call void @nanos6_unpacked_task_region_foo10(i32* %21, i32* %22, i64 %load_capt_gep, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table)
280+
; CHECK-NEXT: %16 = load i64, i64* %device_lookup_vla, align 8
281+
; CHECK-NEXT: %17 = bitcast i32* %14 to i8*
282+
; CHECK-NEXT: %18 = sub i64 0, %15
283+
; CHECK-NEXT: %19 = getelementptr i8, i8* %17, i64 %18
284+
; CHECK-NEXT: %20 = getelementptr i8, i8* %19, i64 %16
285+
; CHECK-NEXT: %21 = bitcast i8* %20 to i32*
286+
; CHECK-NEXT: store i32* %21, i32** %tlate.load_gep_vla, align 8
287+
; CHECK-NEXT: br label %22
288+
; CHECK: 22: ; preds = %3, %entry
289+
; CHECK-NEXT: %23 = load i32*, i32** %tlate.load_gep_n.addr, align 8
290+
; CHECK-NEXT: %24 = load i32*, i32** %tlate.load_gep_vla, align 8
291+
; CHECK-NEXT: call void @nanos6_unpacked_task_region_foo10(i32* %23, i32* %24, i64 %load_capt_gep, i8* %device_env, %nanos6_address_translation_entry_t* %address_translation_table)
280292
; CHECK-NEXT: ret void
281293
; CHECK-NEXT: }
282294

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