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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 2 |
| 2 | +; RUN: opt %s -passes='default<O3>,ompss-2' -S | FileCheck %s |
| 3 | +; ModuleID = 'check_vla_size_in_task_args.ll' |
| 4 | +source_filename = "check_vla_size_in_task_args.ll" |
| 5 | +target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" |
| 6 | +target triple = "x86_64-unknown-linux-gnu" |
| 7 | + |
| 8 | +; void foo() { |
| 9 | +; int n = 1; |
| 10 | +; int vla[n][20]; |
| 11 | +; #pragma oss task firstprivate(vla) |
| 12 | +; {} |
| 13 | +; } |
| 14 | + |
| 15 | +; Function Attrs: noinline nounwind |
| 16 | +define dso_local void @foo() #0 !dbg !5 { |
| 17 | +entry: |
| 18 | + %n = alloca i32, align 4 |
| 19 | + %saved_stack = alloca ptr, align 8 |
| 20 | + %__vla_expr0 = alloca i64, align 8 |
| 21 | + store i32 1, ptr %n, align 4, !dbg !9 |
| 22 | + %0 = load i32, ptr %n, align 4, !dbg !10 |
| 23 | + %1 = zext i32 %0 to i64, !dbg !11 |
| 24 | + %2 = call ptr @llvm.stacksave(), !dbg !11 |
| 25 | + store ptr %2, ptr %saved_stack, align 8, !dbg !11 |
| 26 | + %vla = alloca [20 x i32], i64 %1, align 16, !dbg !11 |
| 27 | + store i64 %1, ptr %__vla_expr0, align 8, !dbg !11 |
| 28 | + %3 = call token @llvm.directive.region.entry() [ "DIR.OSS"([5 x i8] c"TASK\00"), "QUAL.OSS.FIRSTPRIVATE"(ptr %vla, i32 undef), "QUAL.OSS.VLA.DIMS"(ptr %vla, i64 %1, i64 20), "QUAL.OSS.CAPTURED"(i64 %1, i64 20) ], !dbg !12 |
| 29 | + call void @llvm.directive.region.exit(token %3), !dbg !13 |
| 30 | + %4 = load ptr, ptr %saved_stack, align 8, !dbg !14 |
| 31 | + call void @llvm.stackrestore(ptr %4), !dbg !14 |
| 32 | + ret void, !dbg !14 |
| 33 | +} |
| 34 | + |
| 35 | +; Function Attrs: nocallback nofree nosync nounwind willreturn |
| 36 | +declare ptr @llvm.stacksave() #1 |
| 37 | + |
| 38 | +; Function Attrs: nounwind |
| 39 | +declare token @llvm.directive.region.entry() #2 |
| 40 | + |
| 41 | +; Function Attrs: nounwind |
| 42 | +declare void @llvm.directive.region.exit(token) #2 |
| 43 | + |
| 44 | +; Function Attrs: nocallback nofree nosync nounwind willreturn |
| 45 | +declare void @llvm.stackrestore(ptr) #1 |
| 46 | + |
| 47 | +attributes #0 = { noinline nounwind "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" } |
| 48 | +attributes #1 = { nocallback nofree nosync nounwind willreturn } |
| 49 | +attributes #2 = { nounwind } |
| 50 | + |
| 51 | +!llvm.dbg.cu = !{!0} |
| 52 | +!llvm.module.flags = !{!2, !3} |
| 53 | +!llvm.ident = !{!4} |
| 54 | + |
| 55 | +!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 17.0.0 ([email protected]:llvm-ompss/llvm-mono.git 189d6f1b886a40340f7dd586e6beeca3482d3f5b)", isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug, splitDebugInlining: false, nameTableKind: None) |
| 56 | +!1 = !DIFile(filename: "<stdin>", directory: "") |
| 57 | +!2 = !{i32 2, !"Debug Info Version", i32 3} |
| 58 | +!3 = !{i32 1, !"wchar_size", i32 4} |
| 59 | +!4 = !{! "clang version 17.0.0 ([email protected]:llvm-ompss/llvm-mono.git 189d6f1b886a40340f7dd586e6beeca3482d3f5b)"} |
| 60 | +!5 = distinct !DISubprogram(name: "foo", scope: !6, file: !6, line: 1, type: !7, scopeLine: 1, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !8) |
| 61 | +!6 = !DIFile(filename: "check_vla_size_in_task_args.ll", directory: "") |
| 62 | +!7 = !DISubroutineType(types: !8) |
| 63 | +!8 = !{} |
| 64 | +!9 = !DILocation(line: 2, column: 7, scope: !5) |
| 65 | +!10 = !DILocation(line: 3, column: 11, scope: !5) |
| 66 | +!11 = !DILocation(line: 3, column: 3, scope: !5) |
| 67 | +!12 = !DILocation(line: 4, column: 11, scope: !5) |
| 68 | +!13 = !DILocation(line: 5, column: 4, scope: !5) |
| 69 | +!14 = !DILocation(line: 6, column: 1, scope: !5) |
| 70 | +; CHECK-LABEL: define dso_local void @foo |
| 71 | +; CHECK-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] !dbg [[DBG5:![0-9]+]] { |
| 72 | +; CHECK-NEXT: entry: |
| 73 | +; CHECK-NEXT: [[VLA:%.*]] = alloca [20 x i32], align 16, !dbg [[DBG9:![0-9]+]] |
| 74 | +; CHECK-NEXT: [[TMP0:%.*]] = alloca ptr, align 8, !dbg [[DBG10:![0-9]+]] |
| 75 | +; CHECK-NEXT: [[TMP1:%.*]] = alloca ptr, align 8, !dbg [[DBG10]] |
| 76 | +; CHECK-NEXT: [[NUM_DEPS:%.*]] = alloca i64, align 8, !dbg [[DBG10]] |
| 77 | +; CHECK-NEXT: br label [[FINAL_COND:%.*]], !dbg [[DBG10]] |
| 78 | +; CHECK: codeRepl: |
| 79 | +; CHECK-NEXT: store i64 0, ptr [[NUM_DEPS]], align 8, !dbg [[DBG10]] |
| 80 | +; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[NUM_DEPS]], align 8, !dbg [[DBG10]] |
| 81 | +; CHECK-NEXT: call void @nanos6_create_task(ptr @task_info_var_foo, ptr @task_invocation_info_foo, ptr null, i64 112, ptr [[TMP0]], ptr [[TMP1]], i64 0, i64 [[TMP2]]), !dbg [[DBG10]] |
| 82 | +; CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP0]], align 8, !dbg [[DBG10]] |
| 83 | +; CHECK-NEXT: [[ARGS_END:%.*]] = getelementptr i8, ptr [[TMP3]], i64 32, !dbg [[DBG10]] |
| 84 | +; CHECK-NEXT: [[GEP_VLA:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO:%.*]], ptr [[TMP3]], i32 0, i32 0, !dbg [[DBG10]] |
| 85 | +; CHECK-NEXT: store ptr [[ARGS_END]], ptr [[GEP_VLA]], align 4, !dbg [[DBG10]] |
| 86 | +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[ARGS_END]], i64 80, !dbg [[DBG10]] |
| 87 | +; CHECK-NEXT: [[GEP_VLA1:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP3]], i32 0, i32 0, !dbg [[DBG10]] |
| 88 | +; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[GEP_VLA1]], align 8, !dbg [[DBG10]] |
| 89 | +; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[VLA]], i64 80, i1 false), !dbg [[DBG10]] |
| 90 | +; CHECK-NEXT: [[CAPT_GEP_:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP3]], i32 0, i32 1, !dbg [[DBG10]] |
| 91 | +; CHECK-NEXT: store i64 1, ptr [[CAPT_GEP_]], align 8, !dbg [[DBG10]] |
| 92 | +; CHECK-NEXT: [[CAPT_GEP_2:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP3]], i32 0, i32 2, !dbg [[DBG10]] |
| 93 | +; CHECK-NEXT: store i64 20, ptr [[CAPT_GEP_2]], align 8, !dbg [[DBG10]] |
| 94 | +; CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP1]], align 8, !dbg [[DBG10]] |
| 95 | +; CHECK-NEXT: call void @nanos6_submit_task(ptr [[TMP6]]), !dbg [[DBG10]] |
| 96 | +; CHECK-NEXT: br label [[FINAL_END:%.*]], !dbg [[DBG10]] |
| 97 | +; CHECK: final.end: |
| 98 | +; CHECK-NEXT: ret void, !dbg [[DBG11:![0-9]+]] |
| 99 | +; CHECK: final.then: |
| 100 | +; CHECK-NEXT: br label [[FINAL_END]], !dbg [[DBG11]] |
| 101 | +; CHECK: final.cond: |
| 102 | +; CHECK-NEXT: [[TMP7:%.*]] = call i32 @nanos6_in_final(), !dbg [[DBG10]] |
| 103 | +; CHECK-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0, !dbg [[DBG10]] |
| 104 | +; CHECK-NEXT: br i1 [[TMP8]], label [[FINAL_THEN:%.*]], label [[CODEREPL:%.*]], !dbg [[DBG10]] |
| 105 | +; |
| 106 | +; |
| 107 | +; CHECK-LABEL: define internal void @nanos6_ol_duplicate_foo |
| 108 | +; CHECK-SAME: (ptr [[TASK_ARGS_SRC:%.*]], ptr [[TASK_ARGS_DST:%.*]]) { |
| 109 | +; CHECK-NEXT: entry: |
| 110 | +; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TASK_ARGS_DST]], align 8 |
| 111 | +; CHECK-NEXT: [[ARGS_END:%.*]] = getelementptr i8, ptr [[TMP0]], i64 32 |
| 112 | +; CHECK-NEXT: [[GEP_DST_VLA:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO:%.*]], ptr [[TMP0]], i32 0, i32 0 |
| 113 | +; CHECK-NEXT: store ptr [[ARGS_END]], ptr [[GEP_DST_VLA]], align 4 |
| 114 | +; CHECK-NEXT: [[GEP_DST_:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP0]], i32 0, i32 1 |
| 115 | +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[GEP_DST_]], align 8 |
| 116 | +; CHECK-NEXT: [[TMP2:%.*]] = mul nuw i64 4, [[TMP1]] |
| 117 | +; CHECK-NEXT: [[GEP_DST_1:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP0]], i32 0, i32 2 |
| 118 | +; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[GEP_DST_1]], align 8 |
| 119 | +; CHECK-NEXT: [[TMP4:%.*]] = mul nuw i64 [[TMP2]], [[TMP3]] |
| 120 | +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[ARGS_END]], i64 [[TMP4]] |
| 121 | +; CHECK-NEXT: [[GEP_SRC_:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS_SRC]], i32 0, i32 1 |
| 122 | +; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[GEP_SRC_]], align 8 |
| 123 | +; CHECK-NEXT: [[TMP7:%.*]] = mul nuw i64 1, [[TMP6]] |
| 124 | +; CHECK-NEXT: [[GEP_SRC_2:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS_SRC]], i32 0, i32 2 |
| 125 | +; CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr [[GEP_SRC_2]], align 8 |
| 126 | +; CHECK-NEXT: [[TMP9:%.*]] = mul nuw i64 [[TMP7]], [[TMP8]] |
| 127 | +; CHECK-NEXT: [[GEP_SRC_VLA:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS_SRC]], i32 0, i32 0 |
| 128 | +; CHECK-NEXT: [[GEP_DST_VLA3:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP0]], i32 0, i32 0 |
| 129 | +; CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[GEP_SRC_VLA]], align 8 |
| 130 | +; CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[GEP_DST_VLA3]], align 8 |
| 131 | +; CHECK-NEXT: [[TMP12:%.*]] = mul nuw i64 [[TMP9]], 4 |
| 132 | +; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP11]], ptr align 4 [[TMP10]], i64 [[TMP12]], i1 false) |
| 133 | +; CHECK-NEXT: [[CAPT_GEP_SRC_:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS_SRC]], i32 0, i32 1 |
| 134 | +; CHECK-NEXT: [[CAPT_GEP_DST_:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP0]], i32 0, i32 1 |
| 135 | +; CHECK-NEXT: [[TMP13:%.*]] = load i64, ptr [[CAPT_GEP_SRC_]], align 8 |
| 136 | +; CHECK-NEXT: store i64 [[TMP13]], ptr [[CAPT_GEP_DST_]], align 8 |
| 137 | +; CHECK-NEXT: [[CAPT_GEP_SRC_4:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS_SRC]], i32 0, i32 2 |
| 138 | +; CHECK-NEXT: [[CAPT_GEP_DST_5:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TMP0]], i32 0, i32 2 |
| 139 | +; CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[CAPT_GEP_SRC_4]], align 8 |
| 140 | +; CHECK-NEXT: store i64 [[TMP14]], ptr [[CAPT_GEP_DST_5]], align 8 |
| 141 | +; CHECK-NEXT: ret void |
| 142 | +; |
| 143 | +; |
| 144 | +; CHECK-LABEL: define internal void @nanos6_unpacked_task_region_foo |
| 145 | +; CHECK-SAME: (ptr [[VLA:%.*]], i64 [[TMP0:%.*]], i64 [[TMP1:%.*]], ptr [[DEVICE_ENV:%.*]], ptr [[ADDRESS_TRANSLATION_TABLE:%.*]]) !dbg [[DBG12:![0-9]+]] { |
| 146 | +; CHECK-NEXT: newFuncRoot: |
| 147 | +; CHECK-NEXT: br label [[TMP2:%.*]], !dbg [[DBG13:![0-9]+]] |
| 148 | +; CHECK: 2: |
| 149 | +; CHECK-NEXT: br label [[DOTEXITSTUB:%.*]], !dbg [[DBG14:![0-9]+]] |
| 150 | +; CHECK: .exitStub: |
| 151 | +; CHECK-NEXT: ret void |
| 152 | +; |
| 153 | +; |
| 154 | +; CHECK-LABEL: define internal void @nanos6_ol_task_region_foo |
| 155 | +; CHECK-SAME: (ptr [[TASK_ARGS:%.*]], ptr [[DEVICE_ENV:%.*]], ptr [[ADDRESS_TRANSLATION_TABLE:%.*]]) { |
| 156 | +; CHECK-NEXT: entry: |
| 157 | +; CHECK-NEXT: [[GEP_VLA:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO:%.*]], ptr [[TASK_ARGS]], i32 0, i32 0 |
| 158 | +; CHECK-NEXT: [[LOAD_GEP_VLA:%.*]] = load ptr, ptr [[GEP_VLA]], align 8 |
| 159 | +; CHECK-NEXT: [[CAPT_GEP:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS]], i32 0, i32 1 |
| 160 | +; CHECK-NEXT: [[LOAD_CAPT_GEP:%.*]] = load i64, ptr [[CAPT_GEP]], align 8 |
| 161 | +; CHECK-NEXT: [[CAPT_GEP1:%.*]] = getelementptr [[NANOS6_TASK_ARGS_FOO]], ptr [[TASK_ARGS]], i32 0, i32 2 |
| 162 | +; CHECK-NEXT: [[LOAD_CAPT_GEP1:%.*]] = load i64, ptr [[CAPT_GEP1]], align 8 |
| 163 | +; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr [[ADDRESS_TRANSLATION_TABLE]], null |
| 164 | +; CHECK-NEXT: br i1 [[TMP0]], label [[TMP1:%.*]], label [[TMP2:%.*]] |
| 165 | +; CHECK: 1: |
| 166 | +; CHECK-NEXT: br label [[TMP2]] |
| 167 | +; CHECK: 2: |
| 168 | +; CHECK-NEXT: call void @nanos6_unpacked_task_region_foo(ptr [[LOAD_GEP_VLA]], i64 [[LOAD_CAPT_GEP]], i64 [[LOAD_CAPT_GEP1]], ptr [[DEVICE_ENV]], ptr [[ADDRESS_TRANSLATION_TABLE]]) |
| 169 | +; CHECK-NEXT: ret void |
| 170 | +; |
| 171 | +; |
| 172 | +; CHECK-LABEL: define internal void @nanos6_constructor_register_task_info() { |
| 173 | +; CHECK-NEXT: entry: |
| 174 | +; CHECK-NEXT: call void @nanos6_register_task_info(ptr @task_info_var_foo) |
| 175 | +; CHECK-NEXT: ret void |
| 176 | +; |
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