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[SCEV] Remove existing predicates implied by newly added ones.
When adding a new predicate to a union predicate, some of the existing predicates may be implied by the new predicate. Remove any existing predicates that are already implied by the new predicate. Depends on llvm#118184.
1 parent 2a7ed2c commit b6c29fd

12 files changed

+41
-639
lines changed

‎llvm/lib/Analysis/ScalarEvolution.cpp

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15083,8 +15083,19 @@ void SCEVUnionPredicate::add(const SCEVPredicate *N, ScalarEvolution &SE) {
1508315083
}
1508415084

1508515085
// Only add predicate if it is not already implied by this union predicate.
15086-
if (!implies(N, SE))
15087-
Preds.push_back(N);
15086+
if (implies(N, SE))
15087+
return;
15088+
15089+
// Build a new vector containing the current predicates, except the ones that
15090+
// are implied by the new predicate N.
15091+
SmallVector<const SCEVPredicate *> PrunedPreds;
15092+
for (auto *P : Preds) {
15093+
if (N->implies(P, SE))
15094+
continue;
15095+
PrunedPreds.push_back(P);
15096+
}
15097+
Preds = std::move(PrunedPreds);
15098+
Preds.push_back(N);
1508815099
}
1508915100

1509015101
PredicatedScalarEvolution::PredicatedScalarEvolution(ScalarEvolution &SE,

‎llvm/test/Analysis/LoopAccessAnalysis/nssw-predicate-implied.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,7 @@ exit:
113113
ret void
114114
}
115115

116-
; FIXME: {0,+,3} implies {0,+,2}.
116+
; {0,+,3} [nssw] implies {0,+,2} [nssw].
117117
define void @wrap_check_iv.3_implies_iv.2_predicates_added_in_different_order(i32 noundef %N, ptr %dst, ptr %src) {
118118
; CHECK-LABEL: 'wrap_check_iv.3_implies_iv.2_predicates_added_in_different_order'
119119
; CHECK-NEXT: loop:
@@ -135,7 +135,6 @@ define void @wrap_check_iv.3_implies_iv.2_predicates_added_in_different_order(i3
135135
; CHECK-EMPTY:
136136
; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop.
137137
; CHECK-NEXT: SCEV assumptions:
138-
; CHECK-NEXT: {0,+,2}<%loop> Added Flags: <nssw>
139138
; CHECK-NEXT: {0,+,3}<%loop> Added Flags: <nssw>
140139
; CHECK-EMPTY:
141140
; CHECK-NEXT: Expressions re-written:

‎llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
2222
; LAA-LABEL: f1
2323
; LAA: Memory dependences are safe{{$}}
2424
; LAA: SCEV assumptions:
25-
; LAA-NEXT: {0,+,2}<%for.body> Added Flags: <nusw>
25+
; LAA-NOT: {0,+,2}<%for.body> Added Flags: <nusw>
2626
; LAA-NEXT: {%a,+,4}<%for.body> Added Flags: <nusw>
2727

2828
; The expression for %mul_ext as analyzed by SCEV is

‎llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -760,7 +760,6 @@ define void @exit_cond_zext_iv(ptr %dst, i64 %N) {
760760
; DEFAULT: vector.scevcheck:
761761
; DEFAULT-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N]], i64 1)
762762
; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[UMAX]], -1
763-
; DEFAULT-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
764763
; DEFAULT-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
765764
; DEFAULT-NEXT: [[TMP3:%.*]] = add i32 1, [[TMP2]]
766765
; DEFAULT-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP3]], 1
@@ -810,7 +809,6 @@ define void @exit_cond_zext_iv(ptr %dst, i64 %N) {
810809
; PRED: vector.scevcheck:
811810
; PRED-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N]], i64 1)
812811
; PRED-NEXT: [[TMP0:%.*]] = add i64 [[UMAX]], -1
813-
; PRED-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
814812
; PRED-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
815813
; PRED-NEXT: [[TMP3:%.*]] = add i32 1, [[TMP2]]
816814
; PRED-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP3]], 1

‎llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -390,7 +390,6 @@ define void @zext_iv_increment(ptr %dst, i64 %N) {
390390
; CHECK: vector.scevcheck:
391391
; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[N]], i64 1)
392392
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[UMAX]], -1
393-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
394393
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP0]] to i32
395394
; CHECK-NEXT: [[TMP3:%.*]] = add i32 1, [[TMP2]]
396395
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i32 [[TMP3]], 1

‎llvm/test/Transforms/LoopVectorize/X86/cost-model.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -335,14 +335,13 @@ define void @multi_exit(ptr %dst, ptr %src.1, ptr %src.2, i64 %A, i64 %B) #0 {
335335
; CHECK-NEXT: [[TMP1:%.*]] = freeze i64 [[TMP0]]
336336
; CHECK-NEXT: [[UMIN7:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP1]], i64 [[A:%.*]])
337337
; CHECK-NEXT: [[TMP2:%.*]] = add nuw i64 [[UMIN7]], 1
338-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[TMP2]], 30
338+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ule i64 [[TMP2]], 28
339339
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
340340
; CHECK: vector.scevcheck:
341341
; CHECK-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[B]], i64 1)
342342
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[UMAX]], -1
343343
; CHECK-NEXT: [[TMP4:%.*]] = freeze i64 [[TMP3]]
344344
; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[TMP4]], i64 [[A]])
345-
; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[UMIN]], 4294967295
346345
; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[UMIN]] to i32
347346
; CHECK-NEXT: [[TMP7:%.*]] = add i32 1, [[TMP6]]
348347
; CHECK-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP7]], 1

‎llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll

Lines changed: 2 additions & 586 deletions
Large diffs are not rendered by default.

‎llvm/test/Transforms/LoopVectorize/X86/pr72969.ll

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,6 @@ define void @test(ptr %p) {
4242
; VEC-NEXT: [[TMP6:%.*]] = add i64 [[UMAX]], -9
4343
; VEC-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], [[P1]]
4444
; VEC-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 3
45-
; VEC-NEXT: [[TMP9:%.*]] = icmp ugt i64 [[TMP8]], 65535
4645
; VEC-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP8]] to i16
4746
; VEC-NEXT: [[TMP11:%.*]] = add i16 2, [[TMP10]]
4847
; VEC-NEXT: [[TMP12:%.*]] = icmp ult i16 [[TMP11]], 2

‎llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,17 +19,11 @@ define i32 @test(ptr %arr, i64 %n) {
1919
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
2020
; CHECK: vector.scevcheck:
2121
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[N]], -2
22-
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8
23-
; CHECK-NEXT: [[TMP3:%.*]] = add i8 1, [[TMP2]]
24-
; CHECK-NEXT: [[TMP4:%.*]] = icmp ult i8 [[TMP3]], 1
25-
; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP1]], 255
26-
; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
2722
; CHECK-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP1]] to i8
2823
; CHECK-NEXT: [[TMP8:%.*]] = add i8 2, [[TMP7]]
2924
; CHECK-NEXT: [[TMP9:%.*]] = icmp ult i8 [[TMP8]], 2
3025
; CHECK-NEXT: [[TMP10:%.*]] = icmp ugt i64 [[TMP1]], 255
31-
; CHECK-NEXT: [[TMP11:%.*]] = or i1 [[TMP9]], [[TMP10]]
32-
; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP6]], [[TMP11]]
26+
; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP9]], [[TMP10]]
3327
; CHECK-NEXT: br i1 [[TMP12]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
3428
; CHECK: vector.ph:
3529
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4

‎llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -42,16 +42,11 @@ define void @test_pr63368(i1 %c, ptr %A) {
4242
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[L_LCSSA_LCSSA]], i32 -1)
4343
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SMAX]], 1
4444
; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[TMP3]] to i8
45-
; CHECK-NEXT: [[TMP5:%.*]] = icmp slt i8 [[TMP4]], 0
46-
; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i32 [[TMP3]], 255
47-
; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP6]]
48-
; CHECK-NEXT: [[TMP8:%.*]] = trunc i32 [[TMP3]] to i8
49-
; CHECK-NEXT: [[TMP9:%.*]] = add i8 1, [[TMP8]]
50-
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i8 [[TMP9]], 1
51-
; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i32 [[TMP3]], 255
52-
; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP10]], [[TMP11]]
53-
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP7]], [[TMP12]]
54-
; CHECK-NEXT: br i1 [[TMP13]], label [[SCALAR_PH3]], label [[VECTOR_PH4:%.*]]
45+
; CHECK-NEXT: [[TMP5:%.*]] = add i8 1, [[TMP4]]
46+
; CHECK-NEXT: [[TMP6:%.*]] = icmp slt i8 [[TMP5]], 1
47+
; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP3]], 255
48+
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
49+
; CHECK-NEXT: br i1 [[TMP8]], label [[SCALAR_PH3]], label [[VECTOR_PH4:%.*]]
5550
; CHECK: vector.ph4:
5651
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP2]], 4
5752
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP2]], [[N_MOD_VF]]
@@ -69,8 +64,8 @@ define void @test_pr63368(i1 %c, ptr %A) {
6964
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[INDEX_NEXT9]], [[N_VEC]]
7065
; CHECK-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK2:%.*]], label [[VECTOR_BODY5]], !llvm.loop [[LOOP4:![0-9]+]]
7166
; CHECK: middle.block2:
72-
; CHECK-NEXT: [[CMP_N6:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]]
73-
; CHECK-NEXT: br i1 [[CMP_N6]], label [[EXIT_2:%.*]], label [[SCALAR_PH3]]
67+
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]]
68+
; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_2:%.*]], label [[SCALAR_PH3]]
7469
; CHECK: scalar.ph3:
7570
; CHECK-NEXT: [[BC_RESUME_VAL5:%.*]] = phi i8 [ [[IND_END]], [[MIDDLE_BLOCK2]] ], [ 0, [[EXIT_1]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
7671
; CHECK-NEXT: br label [[LOOP_2:%.*]]

‎llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll

Lines changed: 14 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -174,20 +174,14 @@ define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {
174174
; CHECK-NEXT: [[TMP7:%.*]] = sub i64 [[TMP6]], [[A1]]
175175
; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 3
176176
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i16
177-
; CHECK-NEXT: [[TMP10:%.*]] = add i16 1, [[TMP9]]
178-
; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i16 [[TMP10]], 1
177+
; CHECK-NEXT: [[TMP10:%.*]] = add i16 2, [[TMP9]]
178+
; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i16 [[TMP10]], 2
179179
; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt i64 [[TMP8]], 65535
180180
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]]
181-
; CHECK-NEXT: [[TMP14:%.*]] = trunc i64 [[TMP8]] to i16
182-
; CHECK-NEXT: [[TMP15:%.*]] = add i16 2, [[TMP14]]
183-
; CHECK-NEXT: [[TMP16:%.*]] = icmp ult i16 [[TMP15]], 2
184-
; CHECK-NEXT: [[TMP17:%.*]] = icmp ugt i64 [[TMP8]], 65535
185-
; CHECK-NEXT: [[TMP18:%.*]] = or i1 [[TMP16]], [[TMP17]]
186-
; CHECK-NEXT: [[TMP19:%.*]] = or i1 [[TMP13]], [[TMP18]]
187-
; CHECK-NEXT: br i1 [[TMP19]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
181+
; CHECK-NEXT: br i1 [[TMP13]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
188182
; CHECK: vector.memcheck:
189-
; CHECK-NEXT: [[TMP20:%.*]] = sub i64 [[C2]], [[A3]]
190-
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP20]], 32
183+
; CHECK-NEXT: [[TMP14:%.*]] = sub i64 [[C2]], [[A3]]
184+
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP14]], 32
191185
; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
192186
; CHECK: vector.ph:
193187
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 4
@@ -199,16 +193,16 @@ define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {
199193
; CHECK: vector.body:
200194
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
201195
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
202-
; CHECK-NEXT: [[TMP21:%.*]] = add i64 [[OFFSET_IDX]], 0
203-
; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i64, ptr [[A]], i64 [[TMP21]]
204-
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i64, ptr [[TMP22]], i32 0
205-
; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP23]], align 4
206-
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i64, ptr [[C]], i64 [[TMP21]]
207-
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i64, ptr [[TMP24]], i32 0
208-
; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP25]], align 4
196+
; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 0
197+
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i64, ptr [[A]], i64 [[TMP15]]
198+
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i64, ptr [[TMP16]], i32 0
199+
; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP17]], align 4
200+
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i64, ptr [[C]], i64 [[TMP15]]
201+
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i64, ptr [[TMP18]], i32 0
202+
; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP19]], align 4
209203
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
210-
; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
211-
; CHECK-NEXT: br i1 [[TMP26]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
204+
; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
205+
; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
212206
; CHECK: middle.block:
213207
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]
214208
; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]

‎llvm/test/Transforms/LoopVersioning/wrapping-pointer-versioning.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,15 +29,13 @@ define void @f1(ptr noalias %a,
2929
; LV-LABEL: @f1(
3030
; LV-NEXT: for.body.lver.check:
3131
; LV-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
32-
; LV-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[TMP0]], 4294967295
3332
; LV-NEXT: [[MUL1:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[TMP0]])
3433
; LV-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i64, i1 } [[MUL1]], 0
3534
; LV-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i64, i1 } [[MUL1]], 1
3635
; LV-NEXT: [[TMP2:%.*]] = sub i64 0, [[MUL_RESULT]]
3736
; LV-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[MUL_RESULT]]
3837
; LV-NEXT: [[TMP4:%.*]] = icmp ult ptr [[TMP3]], [[A]]
39-
; LV-NEXT: [[TMP5:%.*]] = or i1 [[TMP4]], [[MUL_OVERFLOW]]
40-
; LV-NEXT: [[TMP6:%.*]] = or i1 [[TMP1]], [[TMP5]]
38+
; LV-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[MUL_OVERFLOW]]
4139
; LV-NEXT: br i1 [[TMP6]], label [[FOR_BODY_PH_LVER_ORIG:%.*]], label [[FOR_BODY_PH:%.*]]
4240
; LV: for.body.ph.lver.orig:
4341
; LV-NEXT: br label [[FOR_BODY_LVER_ORIG:%.*]]

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