Prevent initial bad clock drift calculation on timer init.

dok-net · dok-net · commit cf875ccb47e7 · 2022-12-10T23:26:28.000+01:00
diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp
@@ -122,6 +122,7 @@ static void initTimer() {
   ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt);
   timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE);
   waveform.timer1Running = true;
+  waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS;
   timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste
 }
 
@@ -229,6 +230,7 @@ IRAM_ATTR int stopWaveform_weak(uint8_t pin) {
     std::atomic_thread_fence(std::memory_order_release);
     // Must not interfere if Timer is due shortly
     if (T1V > IRQLATENCYCCYS) {
+      waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS;
       timer1_write(IRQLATENCYCCYS);
     }
     while (waveform.toDisableBits) {

Original file line number	Diff line number	Diff line change
`@@ -122,6 +122,7 @@ static void initTimer() {`
`122`	`122`	`ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt);`
`123`	`123`	`timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE);`
`124`	`124`	`waveform.timer1Running = true;`
	`125`	`+ waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS;`
`125`	`126`	`timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste`
`126`	`127`	`}`
`127`	`128`
`@@ -229,6 +230,7 @@ IRAM_ATTR int stopWaveform_weak(uint8_t pin) {`
`229`	`230`	`std::atomic_thread_fence(std::memory_order_release);`
`230`	`231`	`// Must not interfere if Timer is due shortly`
`231`	`232`	`if (T1V > IRQLATENCYCCYS) {`
	`233`	`+ waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS;`
`232`	`234`	`timer1_write(IRQLATENCYCCYS);`
`233`	`235`	`}`
`234`	`236`	`while (waveform.toDisableBits) {`