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[ValueTracking][X86] computeKnownBitsFromOperator - add PMULH/PMULHU intrinsics mulhs/mulhu known bits handling.
These map directly to the KnownBits implementations.
1 parent e6cf292 commit 5c204b1

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+20
-30
lines changed

3 files changed

+20
-30
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llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1739,6 +1739,20 @@ static void computeKnownBitsFromOperator(const Operator *I,
17391739
Known &= Known2.anyextOrTrunc(BitWidth);
17401740
break;
17411741
}
1742+
case Intrinsic::x86_sse2_pmulh_w:
1743+
case Intrinsic::x86_avx2_pmulh_w:
1744+
case Intrinsic::x86_avx512_pmulh_w_512:
1745+
computeKnownBits(I->getOperand(0), DemandedElts, Known, Depth + 1, Q);
1746+
computeKnownBits(I->getOperand(1), DemandedElts, Known2, Depth + 1, Q);
1747+
Known = KnownBits::mulhs(Known, Known2);
1748+
break;
1749+
case Intrinsic::x86_sse2_pmulhu_w:
1750+
case Intrinsic::x86_avx2_pmulhu_w:
1751+
case Intrinsic::x86_avx512_pmulhu_w_512:
1752+
computeKnownBits(I->getOperand(0), DemandedElts, Known, Depth + 1, Q);
1753+
computeKnownBits(I->getOperand(1), DemandedElts, Known2, Depth + 1, Q);
1754+
Known = KnownBits::mulhu(Known, Known2);
1755+
break;
17421756
case Intrinsic::x86_sse42_crc32_64_64:
17431757
Known.Zero.setBitsFrom(32);
17441758
break;

llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -240,11 +240,7 @@ define <32 x i16> @elts_pmulh_512(<32 x i16> %a0, <32 x i16> %a1) {
240240

241241
define <8 x i16> @known_pmulh_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
242242
; CHECK-LABEL: @known_pmulh_128(
243-
; CHECK-NEXT: [[X0:%.*]] = lshr <8 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
244-
; CHECK-NEXT: [[X1:%.*]] = and <8 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
245-
; CHECK-NEXT: [[M:%.*]] = tail call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> [[X0]], <8 x i16> [[X1]])
246-
; CHECK-NEXT: [[R:%.*]] = add <8 x i16> [[M]], [[A2:%.*]]
247-
; CHECK-NEXT: ret <8 x i16> [[R]]
243+
; CHECK-NEXT: ret <8 x i16> [[A2:%.*]]
248244
;
249245
%x0 = lshr <8 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
250246
%x1 = and <8 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
@@ -255,11 +251,7 @@ define <8 x i16> @known_pmulh_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
255251

256252
define <16 x i16> @known_pmulh_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2) {
257253
; CHECK-LABEL: @known_pmulh_256(
258-
; CHECK-NEXT: [[X0:%.*]] = lshr <16 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
259-
; CHECK-NEXT: [[X1:%.*]] = and <16 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
260-
; CHECK-NEXT: [[M:%.*]] = tail call <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16> [[X0]], <16 x i16> [[X1]])
261-
; CHECK-NEXT: [[R:%.*]] = add <16 x i16> [[M]], [[A2:%.*]]
262-
; CHECK-NEXT: ret <16 x i16> [[R]]
254+
; CHECK-NEXT: ret <16 x i16> [[A2:%.*]]
263255
;
264256
%x0 = lshr <16 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
265257
%x1 = and <16 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
@@ -270,11 +262,7 @@ define <16 x i16> @known_pmulh_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a
270262

271263
define <32 x i16> @known_pmulh_512(<32 x i16> %a0, <32 x i16> %a1, <32 x i16> %a2) {
272264
; CHECK-LABEL: @known_pmulh_512(
273-
; CHECK-NEXT: [[X0:%.*]] = lshr <32 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
274-
; CHECK-NEXT: [[X1:%.*]] = and <32 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
275-
; CHECK-NEXT: [[M:%.*]] = tail call <32 x i16> @llvm.x86.avx512.pmulh.w.512(<32 x i16> [[X0]], <32 x i16> [[X1]])
276-
; CHECK-NEXT: [[R:%.*]] = add <32 x i16> [[M]], [[A2:%.*]]
277-
; CHECK-NEXT: ret <32 x i16> [[R]]
265+
; CHECK-NEXT: ret <32 x i16> [[A2:%.*]]
278266
;
279267
%x0 = lshr <32 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
280268
%x1 = and <32 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>

llvm/test/Transforms/InstCombine/X86/x86-pmulhu.ll

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -234,11 +234,7 @@ define <32 x i16> @elts_pmulhu_512(<32 x i16> %a0, <32 x i16> %a1) {
234234

235235
define <8 x i16> @known_pmulhu_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
236236
; CHECK-LABEL: @known_pmulhu_128(
237-
; CHECK-NEXT: [[X0:%.*]] = lshr <8 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
238-
; CHECK-NEXT: [[X1:%.*]] = and <8 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
239-
; CHECK-NEXT: [[M:%.*]] = tail call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> [[X0]], <8 x i16> [[X1]])
240-
; CHECK-NEXT: [[R:%.*]] = add <8 x i16> [[M]], [[A2:%.*]]
241-
; CHECK-NEXT: ret <8 x i16> [[R]]
237+
; CHECK-NEXT: ret <8 x i16> [[A2:%.*]]
242238
;
243239
%x0 = lshr <8 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
244240
%x1 = and <8 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
@@ -249,11 +245,7 @@ define <8 x i16> @known_pmulhu_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2)
249245

250246
define <16 x i16> @known_pmulhu_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2) {
251247
; CHECK-LABEL: @known_pmulhu_256(
252-
; CHECK-NEXT: [[X0:%.*]] = lshr <16 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
253-
; CHECK-NEXT: [[X1:%.*]] = and <16 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
254-
; CHECK-NEXT: [[M:%.*]] = tail call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> [[X0]], <16 x i16> [[X1]])
255-
; CHECK-NEXT: [[R:%.*]] = add <16 x i16> [[M]], [[A2:%.*]]
256-
; CHECK-NEXT: ret <16 x i16> [[R]]
248+
; CHECK-NEXT: ret <16 x i16> [[A2:%.*]]
257249
;
258250
%x0 = lshr <16 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
259251
%x1 = and <16 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
@@ -264,11 +256,7 @@ define <16 x i16> @known_pmulhu_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %
264256

265257
define <32 x i16> @known_pmulhu_512(<32 x i16> %a0, <32 x i16> %a1, <32 x i16> %a2) {
266258
; CHECK-LABEL: @known_pmulhu_512(
267-
; CHECK-NEXT: [[X0:%.*]] = lshr <32 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
268-
; CHECK-NEXT: [[X1:%.*]] = and <32 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
269-
; CHECK-NEXT: [[M:%.*]] = tail call <32 x i16> @llvm.x86.avx512.pmulhu.w.512(<32 x i16> [[X0]], <32 x i16> [[X1]])
270-
; CHECK-NEXT: [[R:%.*]] = add <32 x i16> [[M]], [[A2:%.*]]
271-
; CHECK-NEXT: ret <32 x i16> [[R]]
259+
; CHECK-NEXT: ret <32 x i16> [[A2:%.*]]
272260
;
273261
%x0 = lshr <32 x i16> %a0, <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
274262
%x1 = and <32 x i16> %a1, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>

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