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Simd.js: Removing Float32x4 MinNum and MaxNum builtins.
See tc39/ecmascript_simd#341 MinNum and MaxNum operations are decided to be removed from Simd.js as they are incompatablie with IEE-754 definitions of MinNum and MaxNum, which makes use of quiet NaN's and signaling NaN's.
1 parent 0ee5494 commit 8b5b49a

18 files changed

+1599
-1914
lines changed

‎lib/Backend/LowerMDSharedSimd128.cpp

Lines changed: 0 additions & 126 deletions
Original file line numberDiff line numberDiff line change
@@ -346,10 +346,6 @@ IR::Instr* LowererMD::Simd128LowerUnMappedInstruction(IR::Instr *instr)
346346
case Js::OpCode::Simd128_Max_F4:
347347
return Simd128LowerMinMax_F4(instr);
348348

349-
case Js::OpCode::Simd128_MinNum_F4:
350-
case Js::OpCode::Simd128_MaxNum_F4:
351-
return Simd128LowerMinMaxNum(instr);
352-
353349
case Js::OpCode::Simd128_AnyTrue_B4:
354350
case Js::OpCode::Simd128_AnyTrue_B8:
355351
case Js::OpCode::Simd128_AnyTrue_B16:
@@ -2241,128 +2237,6 @@ IR::Instr* LowererMD::Simd128LowerMinMax_F4(IR::Instr* instr)
22412237

22422238
}
22432239

2244-
2245-
IR::Instr* LowererMD::Simd128LowerMinMaxNum(IR::Instr* instr)
2246-
{
2247-
IR::Instr *pInstr;
2248-
IR::Opnd* dst = instr->GetDst();
2249-
IR::Opnd* src1 = instr->GetSrc1();
2250-
IR::Opnd* src2 = instr->GetSrc2();
2251-
Assert(dst->IsRegOpnd() && dst->IsSimd128());
2252-
Assert(src1->IsRegOpnd() && src1->IsSimd128());
2253-
Assert(src2->IsRegOpnd() && src2->IsSimd128());
2254-
IR::RegOpnd* tmp1 = IR::RegOpnd::New(src1->GetType(), m_func);
2255-
IR::RegOpnd* tmp2 = IR::RegOpnd::New(src1->GetType(), m_func);
2256-
IR::RegOpnd* mask = IR::RegOpnd::New(src1->GetType(), m_func);
2257-
IR::RegOpnd* mask2 = IR::RegOpnd::New(src1->GetType(), m_func);
2258-
2259-
if (instr->m_opcode == Js::OpCode::Simd128_MinNum_F4)
2260-
{
2261-
// dst = MINPS src1, src2
2262-
// This is the correct result or b if either is NaN or both are +/-0.0
2263-
pInstr = IR::Instr::New(Js::OpCode::MINPS, dst, src1, src2, m_func);
2264-
instr->InsertBefore(pInstr);
2265-
Legalize(pInstr);
2266-
2267-
// mask = CMPUNORD src2, src2
2268-
// Find NaNs in b
2269-
pInstr = IR::Instr::New(Js::OpCode::CMPUNORDPS, mask, src2, src2, m_func);
2270-
instr->InsertBefore(pInstr);
2271-
Legalize(pInstr);
2272-
2273-
// mask2 = PCMPEQD src1, [X86_TWO_31_I4]
2274-
// Find -0.0 in a
2275-
pInstr = IR::Instr::New(Js::OpCode::PCMPEQD, mask2, src1, IR::MemRefOpnd::New((void*)&X86_TWO_31_I4, TySimd128I4, m_func), m_func);
2276-
instr->InsertBefore(pInstr);
2277-
Legalize(pInstr);
2278-
2279-
// mask2 = ANDPS mask2, [X86_TWO_31_I4]
2280-
// mask2 is -0.0 where a is -0.0
2281-
pInstr = IR::Instr::New(Js::OpCode::ANDPS, mask2, mask2, IR::MemRefOpnd::New((void*)&X86_TWO_31_I4, TySimd128I4, m_func), m_func);
2282-
instr->InsertBefore(pInstr);
2283-
Legalize(pInstr);
2284-
2285-
// dst = ORPS dst, mask2
2286-
// For lanes where a is -0.0, the result is either correct (negative), or b which is possibly +0.0
2287-
// Safe to force sign to negative for those lanes, +0.0 becomes -0.0.
2288-
pInstr = IR::Instr::New(Js::OpCode::ORPS, dst, dst, mask2, m_func);
2289-
instr->InsertBefore(pInstr);
2290-
Legalize(pInstr);
2291-
2292-
// tmp1 = ANDPS src1, mask
2293-
// tmp2 = ANDNPS mask, dst
2294-
// dst = ORPS tmp1, tmp2
2295-
// For NaNs in b, choose a, else keep result.
2296-
pInstr = IR::Instr::New(Js::OpCode::ANDPS, tmp1, src1, mask, m_func);
2297-
instr->InsertBefore(pInstr);
2298-
Legalize(pInstr);
2299-
2300-
pInstr = IR::Instr::New(Js::OpCode::ANDNPS, tmp2, mask, dst, m_func);
2301-
instr->InsertBefore(pInstr);
2302-
Legalize(pInstr);
2303-
2304-
pInstr = IR::Instr::New(Js::OpCode::ORPS, dst, tmp1, tmp2, m_func);
2305-
instr->InsertBefore(pInstr);
2306-
Legalize(pInstr);
2307-
}
2308-
else if (instr->m_opcode == Js::OpCode::Simd128_MaxNum_F4)
2309-
{
2310-
// dst = MAXPS src1, src2
2311-
// This is the correct result or b if either is NaN or both are +/-0.0
2312-
pInstr = IR::Instr::New(Js::OpCode::MAXPS, dst, src1, src2, m_func);
2313-
instr->InsertBefore(pInstr);
2314-
Legalize(pInstr);
2315-
2316-
// Find NaNs in b
2317-
// mask = CMPUNORPS src2, src2
2318-
pInstr = IR::Instr::New(Js::OpCode::CMPUNORDPS, mask, src2, src2, m_func);
2319-
instr->InsertBefore(pInstr);
2320-
Legalize(pInstr);
2321-
2322-
// mask2 = PCMPEQD src1, [X86_ALL_ZEROS]
2323-
// Find +0.0 in a
2324-
pInstr = IR::Instr::New(Js::OpCode::PCMPEQD, mask2, src1, IR::MemRefOpnd::New((void*)&X86_ALL_ZEROS, TySimd128I4, m_func), m_func);
2325-
instr->InsertBefore(pInstr);
2326-
Legalize(pInstr);
2327-
2328-
// mask2 = ANDPS mask2, [X86_TWO_31_I4]
2329-
// mask2 is -0.0 (sign mask) where a is +0.0
2330-
pInstr = IR::Instr::New(Js::OpCode::ANDPS, mask2, mask2, IR::MemRefOpnd::New((void*)&X86_TWO_31_I4, TySimd128I4, m_func), m_func);
2331-
instr->InsertBefore(pInstr);
2332-
Legalize(pInstr);
2333-
2334-
// dst = ANDNPS mask2, dst
2335-
// For lanes where a is +0.0, the result is either correct (positive), or b which is possibly -0.0
2336-
// Safe to force sign to positive for those lanes, +0.0 becomes -0.0.
2337-
pInstr = IR::Instr::New(Js::OpCode::ANDNPS, dst, mask2, dst, m_func);
2338-
instr->InsertBefore(pInstr);
2339-
Legalize(pInstr);
2340-
2341-
// tmp1 = ANDPS src1, mask
2342-
// tmp2 = ANDNPS mask, dst
2343-
// dst = ORPS tmp1, tmp2
2344-
// For NaNs in b, choose a, else keep result.
2345-
pInstr = IR::Instr::New(Js::OpCode::ANDPS, tmp1, src1, mask, m_func);
2346-
instr->InsertBefore(pInstr);
2347-
Legalize(pInstr);
2348-
2349-
pInstr = IR::Instr::New(Js::OpCode::ANDNPS, tmp2, mask, dst, m_func);
2350-
instr->InsertBefore(pInstr);
2351-
Legalize(pInstr);
2352-
2353-
pInstr = IR::Instr::New(Js::OpCode::ORPS, dst, tmp1, tmp2, m_func);
2354-
instr->InsertBefore(pInstr);
2355-
Legalize(pInstr);
2356-
}
2357-
else
2358-
{
2359-
Assert(UNREACHED);
2360-
}
2361-
pInstr = instr->m_prev;
2362-
instr->Remove();
2363-
return pInstr;
2364-
}
2365-
23662240
IR::Instr* LowererMD::Simd128LowerAnyTrue(IR::Instr* instr)
23672241
{
23682242
Assert(instr->m_opcode == Js::OpCode::Simd128_AnyTrue_B4 || instr->m_opcode == Js::OpCode::Simd128_AnyTrue_B8 ||

‎lib/Runtime/Base/JnDirectFields.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -139,8 +139,6 @@ ENTRY(equal)
139139
ENTRY(notEqual)
140140
ENTRY(greaterThanOrEqual)
141141
ENTRY(greaterThan)
142-
ENTRY(minNum)
143-
ENTRY(maxNum)
144142
ENTRY(shiftLeft)
145143
ENTRY(shiftLeftByScalar)
146144
ENTRY(shiftRightByScalar)

‎lib/Runtime/ByteCode/OpCodesSimd.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -293,9 +293,6 @@ MACRO_SIMD_EXTEND_WMS ( Simd128_FromUint16x8Bits_F4 , Float32x4_1Uin
293293
MACRO_SIMD_EXTEND_WMS ( Simd128_FromInt8x16Bits_F4 , Float32x4_1Int8x16_1 , None , OpCanCSE , 0)
294294
MACRO_SIMD_EXTEND_WMS ( Simd128_FromUint8x16Bits_F4 , Float32x4_1Uint8x16_1 , None , OpCanCSE , 0)
295295

296-
MACRO_SIMD_EXTEND_WMS ( Simd128_MinNum_F4 , Float32x4_3 , None , OpCanCSE , 0)
297-
MACRO_SIMD_EXTEND_WMS ( Simd128_MaxNum_F4 , Float32x4_3 , None , OpCanCSE , 0)
298-
299296
MACRO_SIMD_EXTEND_WMS ( Simd128_LtEq_I4 , Bool32x4_1Int32x4_2 , None , None , 0)
300297
MACRO_SIMD_EXTEND_WMS ( Simd128_GtEq_I4 , Bool32x4_1Int32x4_2 , None , None , 0)
301298
MACRO_SIMD_EXTEND_WMS ( Simd128_Neq_I4 , Bool32x4_1Int32x4_2 , None , None , 0)

‎lib/Runtime/Language/AsmJsBuiltInNames.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -190,8 +190,6 @@ ASMJS_SIMD_O_NAMES(float32x4_mul, mul,
190190
ASMJS_SIMD_O_NAMES(float32x4_div, div, Float32x4, Div )
191191
ASMJS_SIMD_O_NAMES(float32x4_min, min, Float32x4, Min )
192192
ASMJS_SIMD_O_NAMES(float32x4_max, max, Float32x4, Max )
193-
ASMJS_SIMD_O_NAMES(float32x4_minNum, minNum, Float32x4, MinNum )
194-
ASMJS_SIMD_O_NAMES(float32x4_maxNum, maxNum, Float32x4, MaxNum )
195193
ASMJS_SIMD_O_NAMES(float32x4_reciprocal, reciprocalApproximation, Float32x4, Reciprocal )
196194
ASMJS_SIMD_O_NAMES(float32x4_reciprocalSqrt, reciprocalSqrtApproximation, Float32x4, ReciprocalSqrt )
197195
ASMJS_SIMD_O_NAMES(float32x4_sqrt, sqrt, Float32x4, Sqrt )

‎lib/Runtime/Language/AsmJsModule.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1537,8 +1537,6 @@ namespace Js
15371537
simdFunctions[AsmJsSIMDBuiltin_float32x4_div] = SIMDFunc(PropertyIds::div, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 2, AsmJsSIMDBuiltin_float32x4_div, OpCodeAsmJs::Simd128_Div_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4, AsmJsType::Float32x4));
15381538
simdFunctions[AsmJsSIMDBuiltin_float32x4_min] = SIMDFunc(PropertyIds::min, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 2, AsmJsSIMDBuiltin_float32x4_min, OpCodeAsmJs::Simd128_Min_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4, AsmJsType::Float32x4));
15391539
simdFunctions[AsmJsSIMDBuiltin_float32x4_max] = SIMDFunc(PropertyIds::max, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 2, AsmJsSIMDBuiltin_float32x4_max, OpCodeAsmJs::Simd128_Max_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4, AsmJsType::Float32x4));
1540-
simdFunctions[AsmJsSIMDBuiltin_float32x4_minNum] = SIMDFunc(PropertyIds::minNum, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 2, AsmJsSIMDBuiltin_float32x4_minNum, OpCodeAsmJs::Simd128_MinNum_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4, AsmJsType::Float32x4));
1541-
simdFunctions[AsmJsSIMDBuiltin_float32x4_maxNum] = SIMDFunc(PropertyIds::maxNum, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 2, AsmJsSIMDBuiltin_float32x4_maxNum, OpCodeAsmJs::Simd128_MaxNum_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4, AsmJsType::Float32x4));
15421540
simdFunctions[AsmJsSIMDBuiltin_float32x4_reciprocal] = SIMDFunc(PropertyIds::reciprocalApproximation, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 1, AsmJsSIMDBuiltin_float32x4_reciprocal, OpCodeAsmJs::Simd128_Rcp_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4));
15431541
simdFunctions[AsmJsSIMDBuiltin_float32x4_reciprocalSqrt] = SIMDFunc(PropertyIds::reciprocalSqrtApproximation, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 1, AsmJsSIMDBuiltin_float32x4_reciprocalSqrt, OpCodeAsmJs::Simd128_RcpSqrt_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4));
15441542
simdFunctions[AsmJsSIMDBuiltin_float32x4_sqrt] = SIMDFunc(PropertyIds::sqrt, Anew(&mAllocator, AsmJsSIMDFunction, nullptr, &mAllocator, 1, AsmJsSIMDBuiltin_float32x4_sqrt, OpCodeAsmJs::Simd128_Sqrt_F4, AsmJsRetType::Float32x4, AsmJsType::Float32x4));

‎lib/Runtime/Language/InterpreterHandlerAsmJs.inl

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -377,9 +377,6 @@ EXDEF2 (NOPASMJS , NopEx , Empty
377377
EXDEF3_WMS ( CUSTOM_ASMJS , Simd128_StArrConst_F4 , OP_SimdStArrConstIndex , AsmSimdTypedArr )
378378
EXDEF3_WMS ( CUSTOM_ASMJS , Simd128_StArrConst_I4 , OP_SimdStArrConstIndex , AsmSimdTypedArr )
379379

380-
EXDEF2_WMS ( SIMD_F4_2toF4_1 , Simd128_MinNum_F4 , Js::SIMDFloat32x4Operation::OpMinNum )
381-
EXDEF2_WMS ( SIMD_F4_2toF4_1 , Simd128_MaxNum_F4 , Js::SIMDFloat32x4Operation::OpMaxNum )
382-
383380
EXDEF2_WMS ( SIMD_U4_1toF4_1 , Simd128_FromUint32x4_F4 , Js::SIMDFloat32x4Operation::OpFromUint32x4 )
384381
EXDEF2_WMS ( SIMD_I8_1toF4_1 , Simd128_FromInt16x8Bits_F4 , Js::SIMDUtils::FromSimdBits )
385382
EXDEF2_WMS ( SIMD_I16_1toF4_1 , Simd128_FromInt8x16Bits_F4 , Js::SIMDUtils::FromSimdBits )

‎lib/Runtime/Language/SimdFloat32x4Operation.cpp

Lines changed: 0 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -215,11 +215,6 @@ namespace Js
215215
Min/Max(a, b) spec semantics:
216216
If any value is NaN, return NaN
217217
a < b ? a : b; where +0.0 > -0.0 (vice versa for Max)
218-
219-
MinNum/MaxNum(a, b) spec semantics:
220-
If 1st value is NaN, return 2nd
221-
If 2nd value is NaN, return 1st
222-
return Min/Max(a, b)
223218
*/
224219
SIMDValue SIMDFloat32x4Operation::OpMin(const SIMDValue& aValue, const SIMDValue& bValue)
225220
{
@@ -283,44 +278,6 @@ namespace Js
283278
return result;
284279
}
285280

286-
SIMDValue SIMDFloat32x4Operation::OpMinNum(const SIMDValue& aValue, const SIMDValue& bValue)
287-
{
288-
SIMDValue result = OpMin(aValue, bValue);
289-
for (uint i = 0; i < 4; i++)
290-
{
291-
float a = aValue.f32[i];
292-
float b = bValue.f32[i];
293-
if (Js::NumberUtilities::IsNan(a))
294-
{
295-
result.f32[i] = b;
296-
}
297-
else if (Js::NumberUtilities::IsNan(b))
298-
{
299-
result.f32[i] = a;
300-
}
301-
}
302-
return result;
303-
}
304-
305-
SIMDValue SIMDFloat32x4Operation::OpMaxNum(const SIMDValue& aValue, const SIMDValue& bValue)
306-
{
307-
SIMDValue result = OpMax(aValue, bValue);
308-
for (uint i = 0; i < 4; i++)
309-
{
310-
float a = aValue.f32[i];
311-
float b = bValue.f32[i];
312-
if (Js::NumberUtilities::IsNan(a))
313-
{
314-
result.f32[i] = b;
315-
}
316-
else if (Js::NumberUtilities::IsNan(b))
317-
{
318-
result.f32[i] = a;
319-
}
320-
}
321-
return result;
322-
}
323-
324281
SIMDValue SIMDFloat32x4Operation::OpScale(const SIMDValue& Value, float scaleValue)
325282
{
326283
SIMDValue result;

‎lib/Runtime/Language/SimdFloat32x4Operation.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,6 @@ namespace Js {
4040
static SIMDValue OpXor(const SIMDValue& aValue, const SIMDValue& bValue);
4141
static SIMDValue OpMin(const SIMDValue& aValue, const SIMDValue& bValue);
4242
static SIMDValue OpMax(const SIMDValue& aValue, const SIMDValue& bValue);
43-
static SIMDValue OpMinNum(const SIMDValue& aValue, const SIMDValue& bValue);
44-
static SIMDValue OpMaxNum(const SIMDValue& aValue, const SIMDValue& bValue);
45-
46-
4743
static SIMDValue OpScale(const SIMDValue& Value, float scaleValue);
4844

4945
static SIMDValue OpLessThan(const SIMDValue& aValue, const SIMDValue& bValue);

‎lib/Runtime/Language/SimdFloat32x4OperationX86X64.cpp

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -221,11 +221,6 @@ namespace Js
221221
If any value is NaN, return NaN
222222
a < b ? a : b; where +0.0 > -0.0 (vice versa for Max)
223223
224-
MinNum/MaxNum(a, b) spec semantics:
225-
If 1st value is NaN, return 2nd
226-
If 2nd value is NaN, return 1st
227-
return Min/Max(a, b)
228-
229224
X86 MIN/MAXPS semantics:
230225
If any value is NaN, return 2nd operand
231226
If both values are +/-0.0, return 2nd operand
@@ -273,59 +268,6 @@ namespace Js
273268
return X86SIMDValue::ToSIMDValue(x86Result);
274269
}
275270

276-
277-
SIMDValue SIMDFloat32x4Operation::OpMinNum(const SIMDValue& aValue, const SIMDValue& bValue)
278-
{
279-
X86SIMDValue x86Result;
280-
X86SIMDValue tmpaValue = X86SIMDValue::ToX86SIMDValue(aValue);
281-
X86SIMDValue tmpbValue = X86SIMDValue::ToX86SIMDValue(bValue);
282-
X86SIMDValue mask, mask2, t1, t2;
283-
284-
// This is the correct result or b if either is NaN or both are +/-0.0
285-
x86Result.m128_value = _mm_min_ps(tmpaValue.m128_value, tmpbValue.m128_value);
286-
// Find NaNs in b
287-
mask.m128_value = _mm_cmpunord_ps(tmpbValue.m128_value, tmpbValue.m128_value);
288-
// Find -0.0 in a
289-
mask2.m128i_value = _mm_cmpeq_epi32(tmpaValue.m128i_value, X86_TWO_31_I4.m128i_value);
290-
// mask2 is -0.0 where a is -0.0
291-
mask2.m128_value = _mm_and_ps(mask2.m128_value, X86_TWO_31_I4.m128_value);
292-
// For lanes where a is -0.0, the result is either correct (negative), or b which is possibly +0.0
293-
// Safe to force sign to negative for those lanes, +0.0 becomes -0.0.
294-
x86Result.m128_value = _mm_or_ps(x86Result.m128_value, mask2.m128_value);
295-
// For NaNs in b, choose a, else keep result.
296-
t1.m128_value = _mm_and_ps(tmpaValue.m128_value, mask.m128_value);
297-
t2.m128_value = _mm_andnot_ps(mask.m128_value, x86Result.m128_value);
298-
x86Result.m128_value = _mm_or_ps(t1.m128_value, t2.m128_value);
299-
300-
return X86SIMDValue::ToSIMDValue(x86Result);
301-
}
302-
303-
SIMDValue SIMDFloat32x4Operation::OpMaxNum(const SIMDValue& aValue, const SIMDValue& bValue)
304-
{
305-
X86SIMDValue x86Result;
306-
X86SIMDValue tmpaValue = X86SIMDValue::ToX86SIMDValue(aValue);
307-
X86SIMDValue tmpbValue = X86SIMDValue::ToX86SIMDValue(bValue);
308-
X86SIMDValue mask, mask2, t1, t2;
309-
310-
// This is the correct result or b if either is NaN or both are +/-0.0
311-
x86Result.m128_value = _mm_max_ps(tmpaValue.m128_value, tmpbValue.m128_value);
312-
// Find NaNs in b
313-
mask.m128_value = _mm_cmpunord_ps(tmpbValue.m128_value, tmpbValue.m128_value);
314-
// Find +0.0 in a
315-
mask2.m128i_value = _mm_cmpeq_epi32(tmpaValue.m128i_value, X86_ALL_ZEROS.m128i_value);
316-
// mask2 is -0.0 where a is +0.0
317-
mask2.m128_value = _mm_and_ps(mask2.m128_value, X86_TWO_31_I4.m128_value);
318-
// For lanes where a is +0.0, the result is either correct (positive), or b which is possibly -0.0
319-
// Safe to force sign to positive for those lanes, +0.0 becomes -0.0.
320-
x86Result.m128_value = _mm_andnot_ps(mask2.m128_value, x86Result.m128_value);
321-
// For NaNs in b, choose a, else keep result.
322-
t1.m128_value = _mm_and_ps(tmpaValue.m128_value, mask.m128_value);
323-
t2.m128_value = _mm_andnot_ps(mask.m128_value, x86Result.m128_value);
324-
x86Result.m128_value = _mm_or_ps(t1.m128_value, t2.m128_value);
325-
326-
return X86SIMDValue::ToSIMDValue(x86Result);
327-
}
328-
329271
SIMDValue SIMDFloat32x4Operation::OpScale(const SIMDValue& Value, float scaleValue)
330272
{
331273
X86SIMDValue x86Result;

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