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1 parent 2e2b96e commit 32e823cCopy full SHA for 32e823c
drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -693,7 +693,22 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
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}
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+static enum drm_mode_status
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+vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc,
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+ const struct drm_display_mode *mode)
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+{
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+ /* HSM clock must be 108% of the pixel clock. Additionally,
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+ * the AXI clock needs to be at least 25% of pixel clock, but
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+ * HSM ends up being the limiting factor.
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+ */
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+ if (mode->clock > HSM_CLOCK_FREQ / (1000 * 108 / 100))
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+ return MODE_CLOCK_HIGH;
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+
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+ return MODE_OK;
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+}
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static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
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+ .mode_valid = vc4_hdmi_encoder_mode_valid,
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.disable = vc4_hdmi_encoder_disable,
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.enable = vc4_hdmi_encoder_enable,
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};
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