@@ -637,6 +637,72 @@ static const struct rpmh_vreg_hw_data pmic4_lvs = {
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/* LVS hardware does not support voltage or mode configuration. */
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};
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+ static const struct rpmh_vreg_hw_data pmic5_pldo = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_drms_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (1504000 , 0 , 255 , 8000 ),
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+ .n_voltages = 256 ,
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+ .hpm_min_load_uA = 10000 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_ldo ,
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+ .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_drms_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (1504000 , 0 , 62 , 8000 ),
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+ .n_voltages = 63 ,
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+ .hpm_min_load_uA = 10000 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_ldo ,
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+ .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_nldo = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_drms_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (320000 , 0 , 123 , 8000 ),
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+ .n_voltages = 124 ,
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+ .hpm_min_load_uA = 30000 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_ldo ,
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+ .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (320000 , 0 , 215 , 8000 ),
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+ .n_voltages = 216 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_smps ,
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+ .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (300000 , 0 , 263 , 4000 ),
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+ .n_voltages = 264 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_smps ,
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+ .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (2800000 , 0 , 4 , 1600 ),
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+ .n_voltages = 5 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_smps ,
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+ .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode ,
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+ };
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+
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+ static const struct rpmh_vreg_hw_data pmic5_bob = {
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+ .regulator_type = VRM ,
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+ .ops = & rpmh_regulator_vrm_bypass_ops ,
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+ .voltage_range = REGULATOR_LINEAR_RANGE (300000 , 0 , 135 , 32000 ),
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+ .n_voltages = 135 ,
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+ .pmic_mode_map = pmic_mode_map_pmic4_bob ,
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+ .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode ,
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+ };
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+
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#define RPMH_VREG (_name , _resource_name , _hw_data , _supply_name ) \
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{ \
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.name = _name, \
@@ -705,6 +771,75 @@ static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
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{},
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};
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+ static const struct rpmh_vreg_init_data pm8150_vreg_data [] = {
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+ RPMH_VREG ("smps1" , "smp%s1" , & pmic5_ftsmps510 , "vdd-s1" ),
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+ RPMH_VREG ("smps2" , "smp%s2" , & pmic5_ftsmps510 , "vdd-s2" ),
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+ RPMH_VREG ("smps3" , "smp%s3" , & pmic5_ftsmps510 , "vdd-s3" ),
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+ RPMH_VREG ("smps4" , "smp%s4" , & pmic5_hfsmps510 , "vdd-s4" ),
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+ RPMH_VREG ("smps5" , "smp%s5" , & pmic5_hfsmps510 , "vdd-s5" ),
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+ RPMH_VREG ("smps6" , "smp%s6" , & pmic5_ftsmps510 , "vdd-s6" ),
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+ RPMH_VREG ("smps7" , "smp%s7" , & pmic5_ftsmps510 , "vdd-s7" ),
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+ RPMH_VREG ("smps8" , "smp%s8" , & pmic5_ftsmps510 , "vdd-s8" ),
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+ RPMH_VREG ("smps9" , "smp%s9" , & pmic5_ftsmps510 , "vdd-s9" ),
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+ RPMH_VREG ("smps10" , "smp%s10" , & pmic5_ftsmps510 , "vdd-s10" ),
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+ RPMH_VREG ("ldo1" , "ldo%s1" , & pmic5_nldo , "vdd-l1-l8-l11" ),
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+ RPMH_VREG ("ldo2" , "ldo%s2" , & pmic5_pldo , "vdd-l2-l10" ),
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+ RPMH_VREG ("ldo3" , "ldo%s3" , & pmic5_nldo , "vdd-l3-l4-l5-l18" ),
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+ RPMH_VREG ("ldo4" , "ldo%s4" , & pmic5_nldo , "vdd-l3-l4-l5-l18" ),
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+ RPMH_VREG ("ldo5" , "ldo%s5" , & pmic5_nldo , "vdd-l3-l4-l5-l18" ),
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+ RPMH_VREG ("ldo6" , "ldo%s6" , & pmic5_nldo , "vdd-l6-l9" ),
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+ RPMH_VREG ("ldo7" , "ldo%s7" , & pmic5_pldo , "vdd-l7-l12-l14-l15" ),
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+ RPMH_VREG ("ldo8" , "ldo%s8" , & pmic5_nldo , "vdd-l1-l8-l11" ),
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+ RPMH_VREG ("ldo9" , "ldo%s9" , & pmic5_nldo , "vdd-l6-l9" ),
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+ RPMH_VREG ("ldo10" , "ldo%s10" , & pmic5_pldo , "vdd-l2-l10" ),
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+ RPMH_VREG ("ldo11" , "ldo%s11" , & pmic5_nldo , "vdd-l1-l8-l11" ),
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+ RPMH_VREG ("ldo12" , "ldo%s12" , & pmic5_pldo_lv , "vdd-l7-l12-l14-l15" ),
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+ RPMH_VREG ("ldo13" , "ldo%s13" , & pmic5_pldo , "vdd-l13-l6-l17" ),
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+ RPMH_VREG ("ldo14" , "ldo%s14" , & pmic5_pldo_lv , "vdd-l7-l12-l14-l15" ),
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+ RPMH_VREG ("ldo15" , "ldo%s15" , & pmic5_pldo_lv , "vdd-l7-l12-l14-l15" ),
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+ RPMH_VREG ("ldo16" , "ldo%s16" , & pmic5_pldo , "vdd-l13-l6-l17" ),
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+ RPMH_VREG ("ldo17" , "ldo%s17" , & pmic5_pldo , "vdd-l13-l6-l17" ),
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+ RPMH_VREG ("ldo18" , "ldo%s18" , & pmic5_nldo , "vdd-l3-l4-l5-l18" ),
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+ {},
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+ };
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+
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+ static const struct rpmh_vreg_init_data pm8150l_vreg_data [] = {
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+ RPMH_VREG ("smps1" , "smp%s1" , & pmic5_ftsmps510 , "vdd-s1" ),
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+ RPMH_VREG ("smps2" , "smp%s2" , & pmic5_ftsmps510 , "vdd-s2" ),
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+ RPMH_VREG ("smps3" , "smp%s3" , & pmic5_ftsmps510 , "vdd-s3" ),
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+ RPMH_VREG ("smps4" , "smp%s4" , & pmic5_ftsmps510 , "vdd-s4" ),
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+ RPMH_VREG ("smps5" , "smp%s5" , & pmic5_ftsmps510 , "vdd-s5" ),
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+ RPMH_VREG ("smps6" , "smp%s6" , & pmic5_ftsmps510 , "vdd-s6" ),
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+ RPMH_VREG ("smps7" , "smp%s7" , & pmic5_ftsmps510 , "vdd-s7" ),
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+ RPMH_VREG ("smps8" , "smp%s8" , & pmic5_hfsmps510 , "vdd-s8" ),
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+ RPMH_VREG ("ldo1" , "ldo%s1" , & pmic5_pldo_lv , "vdd-l1-l8" ),
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+ RPMH_VREG ("ldo2" , "ldo%s2" , & pmic5_nldo , "vdd-l2-l3" ),
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+ RPMH_VREG ("ldo3" , "ldo%s3" , & pmic5_nldo , "vdd-l2-l3" ),
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+ RPMH_VREG ("ldo4" , "ldo%s4" , & pmic5_pldo , "vdd-l4-l5-l6" ),
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+ RPMH_VREG ("ldo5" , "ldo%s5" , & pmic5_pldo , "vdd-l4-l5-l6" ),
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+ RPMH_VREG ("ldo6" , "ldo%s6" , & pmic5_pldo , "vdd-l4-l5-l6" ),
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+ RPMH_VREG ("ldo7" , "ldo%s7" , & pmic5_pldo , "vdd-l7-l11" ),
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+ RPMH_VREG ("ldo8" , "ldo%s8" , & pmic5_pldo_lv , "vdd-l1-l8-l11" ),
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+ RPMH_VREG ("ldo9" , "ldo%s9" , & pmic5_pldo , "vdd-l9-l10" ),
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+ RPMH_VREG ("ldo10" , "ldo%s10" , & pmic5_pldo , "vdd-l9-l10" ),
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+ RPMH_VREG ("ldo11" , "ldo%s11" , & pmic5_pldo , "vdd-l7-l11" ),
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+ RPMH_VREG ("bob" , "bob%s1" , & pmic5_bob , "vdd-bob" ),
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+ {},
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+ };
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+
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+ static const struct rpmh_vreg_init_data pm8009_vreg_data [] = {
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+ RPMH_VREG ("smps1" , "smp%s1" , & pmic5_hfsmps510 , "vdd-s1" ),
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+ RPMH_VREG ("smps2" , "smp%s2" , & pmic5_hfsmps515 , "vdd-s2" ),
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+ RPMH_VREG ("ldo1" , "ldo%s1" , & pmic5_nldo , "vdd-l1" ),
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+ RPMH_VREG ("ldo2" , "ldo%s2" , & pmic5_nldo , "vdd-l2" ),
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+ RPMH_VREG ("ldo3" , "ldo%s3" , & pmic5_nldo , "vdd-l3" ),
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+ RPMH_VREG ("ldo4" , "ldo%s4" , & pmic5_nldo , "vdd-l4" ),
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+ RPMH_VREG ("ldo5" , "ldo%s5" , & pmic5_pldo , "vdd-l5-l6" ),
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+ RPMH_VREG ("ldo6" , "ldo%s6" , & pmic5_pldo , "vdd-l5-l6" ),
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+ RPMH_VREG ("ldo7" , "ldo%s6" , & pmic5_pldo_lv , "vdd-l7" ),
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+ {},
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+ };
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+
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static int rpmh_regulator_probe (struct platform_device * pdev )
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{
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struct device * dev = & pdev -> dev ;
@@ -755,6 +890,18 @@ static const struct of_device_id rpmh_regulator_match_table[] = {
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.compatible = "qcom,pm8005-rpmh-regulators" ,
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.data = pm8005_vreg_data ,
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},
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+ {
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+ .compatible = "qcom,pm8150-rpmh-regulators" ,
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+ .data = pm8150_vreg_data ,
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+ },
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+ {
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+ .compatible = "qcom,pm8150l-rpmh-regulators" ,
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+ .data = pm8150l_vreg_data ,
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+ },
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+ {
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+ .compatible = "qcom,pm8009-rpmh-regulators" ,
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+ .data = pm8009_vreg_data ,
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+ },
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{}
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};
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MODULE_DEVICE_TABLE (of , rpmh_regulator_match_table );
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