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WIP: bdep slice (hack)
1 parent 66efdd7 commit 7ec289f

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6 files changed

+245
-72
lines changed

6 files changed

+245
-72
lines changed

src/ecCircuits.ml

Lines changed: 38 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -208,6 +208,7 @@ module type CircuitInterface = sig
208208
val is_decomposable : int -> int -> cbitstring cfun -> bool
209209
val decompose : int -> int -> cbitstring cfun -> (cbitstring cfun) list * (int * int)
210210
val permute : int -> (int -> int) -> cbitstring cfun -> cbitstring cfun
211+
val align_inputs : circuit -> (int * int) list -> circuit
211212

212213
(* Wraps the backend call to deal with args/inputs *)
213214
module CircuitSpec : sig
@@ -709,7 +710,9 @@ module MakeCircuitInterfaceFromCBackend(Backend: CBackend) : CircuitInterface =
709710

710711
(* Inputs helper functions *)
711712
let merge_inputs (cs: cinp list) (ds: cinp list) : cinp list =
712-
cs @ ds
713+
(* FIXME: hack *)
714+
if cs = ds then cs
715+
else cs @ ds
713716

714717
let merge_inputs_list (cs: cinp list list) : cinp list =
715718
List.fold_right (merge_inputs) cs []
@@ -1573,6 +1576,30 @@ module MakeCircuitInterfaceFromCBackend(Backend: CBackend) : CircuitInterface =
15731576
else Some (id_, w - start_idx))
15741577
| _ -> assert false
15751578

1579+
let align_inputs ((c, inps): circuit) (slcs: (int * int) list) : circuit =
1580+
assert ((List.length inps = 1) && (List.length slcs = 1));
1581+
let (sz, offset) = List.hd slcs in
1582+
let inp = match inps with
1583+
| {type_ = `CIBitstring w_} as inp :: [] ->
1584+
{inp with type_ = `CIBitstring sz}
1585+
| {type_ = `CIArray (w, n)} as inp :: [] ->
1586+
assert (sz mod w = 0);
1587+
{inp with type_ = `CIArray (w, sz / w)}
1588+
| _ -> assert false
1589+
in
1590+
let aligner =
1591+
(fun (id_, w) ->
1592+
Format.eprintf "Aligning id=%d w=%d offset=%d sz=%d@." id_ w offset sz;
1593+
if inp.id <> id_ then None else
1594+
if w < offset || w >= offset + sz then Some Backend.bad
1595+
else Some (Backend.input_node ~id:id_ (w - offset)))
1596+
in
1597+
match c with
1598+
| `CBitstring r -> (`CBitstring (Backend.applys aligner r), [inp])
1599+
| `CArray (r, w) -> (`CArray (Backend.applys aligner r, w), [inp])
1600+
| `CTuple (r, ws) -> (`CTuple (Backend.applys aligner r, ws), [inp])
1601+
| `CBool b -> (`CBool (Backend.apply aligner b), [inp])
1602+
15761603
let split_renamer (n: count) (in_w: width) (inp: cinp) : (cinp array) * (Backend.inp -> cbool_type option) =
15771604
match inp with
15781605
| {type_ = `CIBitstring w; id} when w mod in_w = 0 ->
@@ -1596,13 +1623,14 @@ module MakeCircuitInterfaceFromCBackend(Backend: CBackend) : CircuitInterface =
15961623
let n = (Backend.size_of_reg r) / out_w in
15971624
let blocks = Array.init n (fun i ->
15981625
Backend.slice r (i*out_w) out_w) in
1599-
let range, cinp, aligner = align_renamer c in
1626+
(* let range, cinp, aligner = align_renamer c in *)
1627+
let cinp = (List.hd inps) in
16001628
let cinps, renamer = split_renamer n in_w cinp in
1601-
let renamer = fun i -> Option.bind (aligner i) renamer in
1629+
(* let renamer = fun i -> Option.bind (aligner i) renamer in *)
16021630
Array.map2 (fun r inp ->
16031631
let r = Backend.applys renamer r in
16041632
(`CBitstring r, [inp])
1605-
) blocks cinps |> Array.to_list, range
1633+
) blocks cinps |> Array.to_list, (0,0)
16061634

16071635
let permute (w: width) (perm: (int -> int)) ((`CBitstring r, inps): cbitstring cfun) : cbitstring cfun =
16081636
`CBitstring (Backend.permute w perm r), inps
@@ -2241,6 +2269,12 @@ let circuit_aggregate =
22412269
let circuit_aggregate_inps =
22422270
circuit_aggregate_inputs
22432271

2272+
let circuit_slice (c: circuit) (sz: int) (offset: int) = assert false
2273+
2274+
(* FIXME: this should use ids instead of strings *)
2275+
let circuit_align_inputs (c: circuit) (slcs: (symbol * (int * int)) list) =
2276+
align_inputs c (List.snd slcs)
2277+
22442278
let circuit_flatten (c: circuit) =
22452279
(cbitstring_of_circuit ~strict:false c :> circuit)
22462280

src/ecCircuits.mli

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,3 +63,6 @@ val process_instr : hyps -> memory -> pstate -> instr -> pstate
6363

6464
(* Temporary? *)
6565
val circuit_of_form_with_hyps : ?pstate:pstate -> ?cache:cache -> hyps -> form -> circuit
66+
67+
val circuit_slice : circuit -> int -> int -> circuit
68+
val circuit_align_inputs : circuit -> (symbol * (int * int)) list -> circuit

src/ecParser.mly

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3202,9 +3202,16 @@ interleave_info:
32023202
| IDASSIGN o=codepos x=lvalue_var
32033203
{ Prwprgm (`IdAssign (o, x)) }
32043204

3205+
bd_var:
3206+
| s=lident LBRACKET t=qoident COLON j=uint RBRACKET
3207+
{ `Slice (s, (t,j)) :> bdepvar }
3208+
3209+
| s=lident
3210+
{ `Var s :> bdepvar }
3211+
32053212
bd_vars:
3206-
| vs=plist0(lident, SEMICOLON)
3207-
{ List.map (fun v -> (`Var v :> bdepvar)) vs }
3213+
| vs=plist0(bd_var, SEMICOLON)
3214+
{ vs }
32083215

32093216
| v=lident COLON w=word
32103217
{ [(`VarRange (v, w) :> bdepvar)] }

src/ecParsetree.ml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -722,7 +722,7 @@ type matchmode = [
722722
]
723723

724724
(* -------------------------------------------------------------------- *)
725-
type bdepvar = [`Var of psymbol | `VarRange of psymbol * int]
725+
type bdepvar = [`Var of psymbol | `VarRange of psymbol * int | `Slice of psymbol * (pqsymbol * zint)]
726726

727727
type bdep_info =
728728
{ n : int

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